A 68-GHz Loss Compensated Distributed Amplifier Using Frequency Interleaved Technique in 65-nm CMOS Technology

This article presents a frequency interleaved technique (FIT) that can be applied to add resonant peaks in the response of distributed amplifier (DA) for loss compensation and then a frequency-interleaved distributed amplifier (FIDA) that can achieve a high-gain and wide-bandwidth frequency response by summing multiple overlapping distinct-band frequency responses through a distributed configuration. A detailed discussion was introduced to verify the FIDA and a DA was implemented using the FIT. The reported 65-nm CMOS FIDA chip occupies an area of $0.9\times 0.95\,\,\text {mm}^{2}$ and achieves a 17.2 dB small-signal power gain, 2–68 GHz −3-dB bandwidth, gain bandwidth product (GBW) of 478 GHz, and gain ripple of less than 2 dB, while consuming 120 mW under 1.2 V.

I. Introduction

Distributed amplifiers (DAs) provide power gain and impedance matching over a broad bandwidth, supporting instantaneous wide bandwidth for high data-rate communication systems and high-resolution radar systems. Because of recent technical trends, including advancements in CMOS technology, the increasing prevalence of system-on-a-chip designs, and the integration of high-performance circuits, CMOS DAs have recently received plenty of attention. With heavy substrate doping, CMOS technology, which is used for digital circuit, can attain low substrate resistivity that avoids latch-up problems, but such technology has larger substrate losses and higher parasitic capacitances than others specializing for RF circuits.