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Performance Improved Voltage Controlled Oscillator and Double Balanced Mixer Chip Design | IEEE Conference Publication | IEEE Xplore

Performance Improved Voltage Controlled Oscillator and Double Balanced Mixer Chip Design


Abstract:

This article presents a low-power and layout dimension efficient LC-VCO (voltage-controlled oscillators) and double balanced mixer are designed and implemented in tsmc $0...Show More

Abstract:

This article presents a low-power and layout dimension efficient LC-VCO (voltage-controlled oscillators) and double balanced mixer are designed and implemented in tsmc 0.18\mu\mathrm{m} COMS 1P6M process for microwave communications applications. The proposed VCO circuit applies PMOS cross-coupled pairs LC circuits. From the sourcing voltage of 0.9 V, the overall VCO total power dissipation of 1.54 mW, and tuning range is 532 MHz from 9.25 to 9.78 GHz. The double balanced mixer proposed converter gain of 8 dB, noise figure of 15.6 dB, IIP3 of −4.6 dBm, input P1dB of −1 6dBm. The tuning voltage is from 0 to 0.9V, and chipset core placement with layout optimization is 0.24mm2.
Date of Conference: 28-31 July 2021
Date Added to IEEE Xplore: 08 November 2021
ISBN Information:
Conference Location: Chengdu, China

I. Introduction

After literatures review from previously published database, CMOS LC-VCO designs have been reported and released, commonly as cross-coupled pairs architectures. The proposed low phase noise [1], the multi-band VCO [2], [5], Colpitts VCO [3] and QVCO [4] have achieved excellence performances, consumes optimized chipset size and low power dissipation. The Fig. 1 depicts resonance and impedance matching from the parallel component in the inductor of L1 and capacitor of C1 with series resistor Rs. The Fig. 2 depicts the put forward negative resistor −Rp of active circuit for oscillation structure delivered resistor Rp attenuation and heating loss. The Fig. 3 depicts the recommend CMOS -tank VCO and equivalent circuit. The proposed feedback of cross-coupled pair, M1 and M2 produced negative resistor −Rp to cover loss of parasitic resistance.

(a) -tank amplifier schematic of ideal load (b) -tank amplifier equivalent of real load (c) -tank amplifier of real load in parallel.

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References

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