Time Domain Continuous-Time Model of Current Mode Buck Converter for Power Delivery Network Design

Proper power integrity (PI) analysis is essential for modem electronics devices to minimize voltage noise. The low- frequency response of a power distribution network (PDN) is determined by the voltage regulator modules (VRMs) installed on the board. However, the conventional VRM model is either represented by an over-simplified passive circuit or an encrypted model provided by then vendor. These models can only work for limited operating conditions. In this paper, a generic average model for up-to-date DC converter is proposed. Both time and frequency domain responses of a current-mode buck converter with adaptive on-time control (AOT) method are captured by the proposed model. This cycle-by-cycle averaged model can be extended for converters with other control methods.

I. Introduction

With the decreasing voltage level and the increasing demand for current in modem electronics systems, low noise PDN are becoming more essential to ensure robust operation of devices. In a typical electronics device, CPU is the most power-hungry component which can consume dozens of Watts power. In addition, the power consumed by a processor is highly usage dependent. Therefore, a well-designed PDN should provide a stable output voltage within a tight tolerance range during large current step change with a high slew rate.