I. Introduction
Concerns about global warming and urban air pollution have become central issues in energy policy decision-making, and as a result much research in recent years has focused on the development of energies which are environmental friendly. The generation of electricity using photovoltaic effects is one of these types of energy. It requires the battery for energy storage and voltage power inverter. The voltage produced by a classical inverter contains a high harmonic content due to the square wave nature of the output. Sinusoidal pulse width modulation (SPWM) can significantly reduce these harmonics [1], [2]. Using this strategy, a high-frequency reference triangular wave and a low-frequency sine wave are sent through a high-speed comparator [2]–[5]. The output is a sinusoidally modulated pulse train which is used to switch the power devices in the inverter. The major problem encountered in the implementation of this method is the accurate synchronization of the sine wave with the triangular wave, and the complexity of the hardware [5]. For SPWM systems that are built using microcontrollers or DSPs3, computations are only practical at low frequencies [6]. There are some efficient (Digital Signal Processor) DSP- or microcontroller-based SPWM designs implemented [3], [4], but these designs do not present any substantial improvements of the characteristics of the output waveforms. The generation of PWM gating signals using microcontrollers or DSPs requires most computation resources to be devoted to the process, which affects seriously the performance of the system. The development of field programmable gate array (FPGA) devices [7], [8] over the last two decades provides an alternative solution for the implementation of a SPWM controller. They have the advantage of flexibility due to their reprogramming capability, while their operating frequency can be as much as hundreds of MHz. Recently, FPGAs have been used in power electronic applications for the implementation of complex control schemes, such as fuzzy logic control of DC/DC converter [9] and deadbeat control of a three-phase DC/AC inverter [10]. The authors of paper [11] implemented an FPGA-based multilevel PWM single phase inverter which exhibits a THD (total harmonic distortion) of 3.46%. E. Koutroulis et al [12] have proposed a method for high-frequency PWM generation using FPGA with frequencies up to 3.985 MHz with a duty cycle resolution of 1.56%. M. N. Md Isa et al [13] have implemented an FPGA-based SPWM bridge inverter, but the methods used for digital synthesis are vague and none of the characteristics of the output waveform are presented. L. Hassaine et al [14] have implemented and FPGA-based SPWM by adapting the concept of analogue SPWM generation where the carrier frequency is fixed (20 kHz), however, the authors did not report anything about the characteristics of the output voltage signal such as the frequency range and harmonic distortion. This paper presents a hardware-based special pulse width modulation called SP-SVPWM, which derives from the space vector modulation [15], [16]. The rest of this paper is organized in five sections. Section 2 presents an overview of the proposed SP-SVPWM, section 3 presents its implementation, followed by section 4 which presents a testing or deployment of the SP-SVPWM in an inverter design setting. Section 5 provides the conclusion.