An Ultra-Low Power 900 MHz Intermediate Frequency Low Noise Amplifier For Low-Power RF Receivers

The recent advancement in biomedical and healthcare sectors shows that the portable ambulatory medical devices with very low power consumption play an important role in continuous monitoring and diagnosis of outpatients by mitigating undesired frequent replacing or recharging of power supply source. To aid this requirement, the fully integrated on-chip circuits should consume very little power without compromising on the overall system performance. In this paper, we present a novel ultra-low power dual-stage intermediate frequency low-noise amplifier (IF LNA) operating at 900 MHz designed in TSMC CMOS 40nm technology. The proposed LNA comprises two identical complementary input stages externally matched to 50 Ω at the load and source along with inter-stage matching. Simulation results of the circuit indicate unconditional stability with a power consumption of 112.9 µW from a 0.56 V supply, a noise figure of 4.66 dB, and a gain of 10.2 dB. The input-referred IP3 is around -17.2 dBm. This work aims to be incorporated in a fully integrated ultra-low-power (ULP) RF receiver in the 2.4 GHz ISM band.

I. Introduction

Radio-frequency integrated circuits play a vital role in most of the wireless communication applications. The area of research dealing with the radio frequency front-end (RFFE) has made many significant contributions regardless of major challenges. Some of the challenges include ultra-low power consumption, good sensitivity, and selectivity. The modern-day radio frequency (RF) receivers are consuming large amounts of power to deliver excellent performance. It is very crucial to achieve the desired performance with the least power consumption possible. The reduction of power consumption by a factor of 10–100 would make a huge impact on wireless communications and its wide range of applications. In the existing literature, there are a number of low-noise amplifier (LNA) topologies that are proposed and designed to serve the purpose of providing sufficient gain to the RF signals at the RF front-end with very low power consumption. Some of the ultra-low-power (ULP) LNA topologies are current-reuse gm-boosting LNA, inductively degenerated common source LNA, and inverter-based LNA. The main purpose of this work is to design an LNA at 900 MHz frequency which is aimed to be integrated as an IF LNA in the ULP RF receiver operating in 2.4 GHz band with very low power consumption. Architecture mentioned in [1] is a self-bias inverter with forward body-bias (FBB) operating at 2.45 GHz frequency. It has achieved a gain of 24.4 dB and a noise figure of 2.2 dB with very low power consumption of 12.5 µW. Architecture mentioned in [2] is a current-reuse common-gate LNA operating at 2.4 GHz frequency. It has achieved a gain of 14.2 dB and a noise figure of 3.3 dB with a power consumption of 30 µW. Architecture mentioned in [3] is also an inverter-based LNA at 2.4 GHz frequency without FBB. It has achieved a gain of 13.1 dB and a noise figure of 5.3 dB consuming 60 µW power. Similar topology with inductive shunt-feedback is used in [4] for ultrawideband applications. When it comes to LNA design at lower frequencies, the above mentioned topologies should be carefully implemented to achieve a good gain with very low power consumption. LNAs mentioned in [5], [6] and [7] are operated in sub-GHz frequency range. In [5], multi-gate common source topology is used to improve nonlinearity of the LNA and the design has achieved a gain of 14.9 dB and a noise figure of 1.8 dB with a large power consumption of 5.5 mW. In [6], an inductively degenerated LNA topology is used to achieve a gain of 17.5 dB and a noise figure of 2 dB with a power consumption of 21.6 mW.