Plug-and-Play High-Speed Communication Protocol for Readout-Systems Network Based on FPGA and Gigabit Optical Fiber Network

In nuclear physics applications and medical imaging setups the new generation of instruments for Time-Of-Flight Positron Emission Tomography (TOF-PET) combine detection and first processing steps in what is known as smart sensing. As usual in development of modern digital systems, fast prototyping is a must and for this reason read-out modules are based on Field Programmable Gate Array (FPGA) technology. Each FPGA device is directly connected to an array of Silicon Photon Multipliers (SiPM) and provides timestamping of detected events by means of a high-performance Time-to-Digital Converter (TDC) featuring single-shot precision at tens of picoseconds. In this contribution, we present a communication protocol between a host and a Ring-Chain (RC) architecture of these FPGAs connected in daisy chain by means of Gigabit Transceivers (GT) interfaces. This protocol allows the univocal identification of the sender, the data integrity check and the line congestion management. It is based on three main firmware modules: the first one, the Message Builder (MB), organizes the composition of the message structure, the second one, the Initialization Module (IM), configures the setup, and finally the Traffic Manager (TM) manages the congestion of the RC. The whole architecture, composed of physical layer and communication protocol, features a general-purpose solution to connect many FPGA boards with a reliable connection and high speed, achieving throughput rates up to 250 Mmeasures/s.

I. Introduction

In last years we have demonstrated how to implement a complete Time-Of-Flight Positron Emission Tomography (TOF-PET) module using only Field Programmable Gate Arrays (FPGAs) connected to Silicon Photon Multiplayer (SiPMs) [1]–[3]. FPGAs are used for many tasks as process data and manage communication. The detected events information is carried by timestamps measured by a Time-to-Digital Converter (TDC) implemented on FPGA which is also responsible for the communication of the timestamps. In our architecture, we chose the implementation based on FPGAs since they allow reconfigurability, high flexibility and low costs, these aspects are a big advantage especially in the field of research.