Contents Introduction
Since the supply VDD of battery-powered mobile system-on-chips (SoCs) continues to be scaled down to sub-1V, the high step-down DC-DC conversion from VBAT (≈ 4.5V) to low VDD (≤ 1V) is highly required (the left of Fig. 1). Meanwhile, the current consumption (ILoad) in modern SoCs becomes considerable due to the market demand of high-performance mobile computing. When supplying such a heavy ILoad into a small RLoad (with low VDD), the efficiency degradation in the DC-DC converter is mainly due to conduction loss (ILoad2 × RLoss), where the equivalent RLoss is typically composed of power switch’s RON and inductor’s DCR (RDCR). Moreover, the use of chip inductors having a large RDCR (>> RON) for a smaller footprint makes it more challenging to reduce the conduction loss. To mitigate the power loss by large RDCR, several attempts [1]-[3] have been made (the right of Fig. 1). Contrary to inductor current (IL) equal to ILoad in typical buck converters, they could reduce the IL by distributing the energy deliveries via an additional path formed by an extra capacitor (CF) or inductor (L2). However, the amount of partial energy transferred through an alternative power path varies depending on the duty-ratio (Φ1). As a result, the reduction in IL is highly sensitive to the voltage conversion ratio (VCR) determined by the duty-ratio; especially at low VCRs, the IL-reduction effect can be insignificant. Moreover, a large ripple can occur due to discontinuous energy delivery of CF to the output.
