1. Introduction
Variation in a high-volume manufacturing (HVM) process is a major concern in the design of high-speed interconnects [1] –[3]. The ever-increasing demand for higher bandwidth and lower loss with shrinking design margins makes system performance even more susceptible to uncertainty. Without the means to evaluate signal behavior in a systematic manner as the physical and electrical characteristics of the system components vary, uncertainty may cause significant performance degradation and yield reduction or result in an overly designed system with increased design cycles and cost [3].