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A Sub-1-mW Fractional-N Phase-Locked Loop For Mixer-Based Wake-up Receiver In Wireless Sensors | IEEE Conference Publication | IEEE Xplore

A Sub-1-mW Fractional-N Phase-Locked Loop For Mixer-Based Wake-up Receiver In Wireless Sensors


Abstract:

This paper presents a 750 μW fractional-N Phase-Locked Loop (PLL) for Wake-up Receiver (WuR) architecture. The frequency synthesizer operates from 1.5 to 2.3 GHz and the ...Show More

Abstract:

This paper presents a 750 μW fractional-N Phase-Locked Loop (PLL) for Wake-up Receiver (WuR) architecture. The frequency synthesizer operates from 1.5 to 2.3 GHz and the proposed quadrature phase generator provides four local oscillator signals with the frequencies of 263 MHz, 433 MHz, 868 MHz, and 920 MHz. Several techniques are adopted to facilitate ultra-low-power operation. Inside the Voltage-Controlled Oscillator (VCO), the inductance for the resonance is maximized to provide low power consumption and the capacitor banks are optimized to cover the whole frequency range considering process, voltage, and temperature variations. Controllable tail transistors adjust the current consumption of the VCO and prevent swing reduction due to the large equivalent capacitance of the capacitor banks at the lower frequencies. Furthermore, the power consumption of the digital parts is reduced by operating with a lower supply voltage generated by an on-chip voltage regulator. The PLL is implemented using a 60 nm CMOS process with a core size of 0.5 mm × 0.7 mm. The whole PLL consumes 750 μW and the VCO offers the phase-noise performance of -93.9 and -116.1 dBc/Hz at 100 kHz and 1 MHz offset frequencies from the carrier frequency of 1.85 GHz.
Date of Conference: 21-24 October 2020
Date Added to IEEE Xplore: 01 February 2021
ISBN Information:
Print on Demand(PoD) ISSN: 2163-9612
Conference Location: Yeosu, Korea (South)

Funding Agency:


I. Introduction

Nowadays, Low Power Wide Area Networks (LPWAN) and Wireless Body Area Networks (WBAN) Receivers (Rx) are widely used in applications such as environmental sensors and Internet-of-Things (IoT). The main design challenge associated with these devices is to extend the lifetime of these networks under limited energy sources. A Radio Frequency (RF) transceiver consumes high power consumption when it is active. Therefore, it would be efficient if we make the transceiver off and wake it up only when it is needed. A Wake-up Receiver (WuRx) continuously listens for the wake-up signal and activates the main Rx when the wake-up signal is detected. As the distance between sensors increases the sensitivity of the WuRx needs to be increased, which results in consuming more power by the WuRx. In contrast, power consumption is the major criterion in the design of a WuRx. A WuRx can be implemented in two ways, with/without the mixer [1]. A mixer-based WuRx utilizes a Local Oscillator (LO), generated by a Phase-Locked Loop (PLL) to convert down the received RF signal by the Low-Noise Amplifier (LNA) to a specified Intermediate Frequency (IF). The PLL is the most power-hungry building block of a WuRx. Hence, a low power PLL can highly lower the power consumption of the whole WuRx.

Block diagram of the proposed PLL.

References

References is not available for this document.