Noise Reduction Effect of Folding-integration ADC in an 8K Image Sensor driven at Various Frame Rates

This paper describes the noise reduction effect of a folding-integration (FI) ADC applied to an 8K image sensor. To maximize the sampling number in correlated multiple sampling (CMS), we implement duplicated pixel source followers, which are operated alternately to reduce the time needed for them to settle. This architecture facilitates sampling numbers of 6, 14, and 30 at 120, 60, and 30 fps, respectively. To investigate the relationship between noise reduction effect and sampling number, the input referred noise of the readout circuit from the pixel-to-column ADC is estimated via theoretical calculations and compared with measurements. As a result, the random noise levels of 3.2, 2.0, and 1.5 e^- were measured at sampling numbers of 6, 14, and 30, respectively, corresponding well with the calculated results. Furthermore, theoretical calculations revealed that the thermal noise component is dominant at higher frame rates while 1/f noise from the source follower becomes dominant at lower frame rates.

I. Introduction

The recent trend for video applications has tended toward even higher spatial resolutions such as 4K and 8K along with higher pixel rates. The video parameters of ultra-high-definition television (UHDTV) are standardized in recommendations ITU-R BT.2020 and ITU-R BT.2100 [1],[2], which specify spatial resolutions of up to 8K and frame frequencies of up to 120 fps. One of the main challenges for an 8K image sensor is achieving both high-speed readout and low noise performance. The single-row time of an 8K 120 fps progressive-scan image sensor is 1.93 μs, which is much shorter than that of high-definition television (HDTV) 1080i (29.6 μs) [3]. In addition, the large number of pixels requires small pixel pitch, which leads to degradation of the signal-to-noise ratio (S/N).