CMOS IC Design from Schematic Level to Silicon within IC Curricula Using Free CAD Software

In this paper we demonstrate the free and open-source methodology used to design integrated circuits all the way from schematic level simulation to silicon-ready GDS fabrication files. This approach has been successfully implemented in the IC design curricula at the Faculty of Electrical Engineering, University of Banja Luka. The example circuits are known designs of a low-dropout regulator and an oscillator. The CMOS technology node is 180 nm process. Each of the tools is briefly presented, and either of the two designs is shown during different design phases.