I. Introduction
Power electronic converters play an important role in energy industry nowadays [1]. Most power converter technologies consist of multiple power semiconductors arranged as a pair of switches in a half-bridge configuration. In the operation of the half-bridge configuration, the high-side and low-side devices are switched complementary with appropriate dead time. The fast switching is a solution to decrease the losses in power converters [2], but it faced challenges due to fast variation of the voltage in the mid-point of the half-bridge [3], [4]. SiC technology involves semiconductor material with a larger band-gap energy compared to Si which allows to build devices which are able to block higher voltages. Moreover, SiC semiconductors are shown with lower on-resistance in conduction mode which allows faster switching [5], [6]. To fully benefit from the mentioned advantages of the half-bridge configuration of semiconductors, the gate driver circuit and layout should be properly designed and optimized which depends directly on proper measurement. The challenge in front of this goal is that the mid-point of half-bridge is varying rapidly between 0V to the DC source voltage (in this work dv/dt = 30kV/μs). Most of the measurement equipment are affected by this big common-mode (CM) voltage. The ability of the measurement equipment to withstand this CM voltage without transferring it into a perturbation for the output signal is called CM rejection ratio (CMRR). The CMRR of measurement equipment is generally degraded at high frequency whereas the increase of switching speeds is a trend in power electronic. Therefore, using maximum switching speed increases the risk of losing important information due to limitation of the measurement equipment. Moreover, the optimized design will be compromised because it will be based on incorrect measurement results. In this work, it is targeted to show the importance of the measurement in the design of the gate driver due to the specificity of the power converter. Considering all the aforementioned importance of measurement, the effect of the measurement technique is targeted to be studied in this work. Measurement challenges in gate-source voltage include: measuring small signals (26V ) in the presence of fast variation of a high CM voltage (here dv/dt = 30kV/μs ), measuring the gate perturbation due to the complementary switching effect and gate signal oscillation due to the parasitic inductance in the layout of the converter [6]. So as, this work is arranged as follows. Section II, introduces the experimental test-bench used to examine the measurement techniques, section III explains differential probes operation to carry out floating measurement, finally the effect of the measurement tools and assessing how they can disturbs the set-up and cause errors in the design of power electronic device will be shown in section IV. The paper will be finished by section V as a conclusion.