Flexible 1.5-GHz Probe Isolation Extension With High CMRR and Robust dv/dt Immunity Empowering Next-Generation WBG Measurement

Advancements in the next-generation wide-bandgap (WBG) power devices, distinguished by higher blocking voltage and faster switching speed, give rise to the advent of ultrahigh dv/dt. These three factors collectively impose demanding performance requirements on future high-performance measurement systems. This article conducts an in-depth exploration of the challenges encountered during the low- and high-side dynamic testing of the next-generation WBG device. Drawing from this examination, the performance requirements for future galvanically isolated testing systems are summarized, i.e., a broad dynamic range extending to medium voltage levels, a minimum measurement bandwidth of 500 MHz, a common-mode rejection ratio (CMRR) of at least 50 dB at 100 MHz, and a dv/dt immunity exceeding 100 V/ns. To effectively response these objectives, the concept of probe isolation extension (PIE) is introduced, with the aim of providing exceptional galvanic isolation while preserving the high electrical performance of traditional nonisolated testing systems to the greatest extent possible. Building upon the PIE concept, an optics-based physical implementation method, known as optical dock (OD), is presented. The operating principles of the OD are derived, and a detailed analysis is conducted to examine the factors that influence its high-frequency response. Additionally, parameter tuning methods are provided to maximize its bandwidth. These collective efforts have successfully resulted in the development of a high-performance PIE OD, which exhibits outstanding galvanic isolation capability, an ultrahigh bandwidth of 1.53 GHz, a high CMRR of 72 dB at 100 MHz, and robust dv/dt immunity of 1.3 kV/ns. Extensive comparative experiments with the state-of-the-art galvanically isolated probes/systems have demonstrated that by incorporating PIE OD to expand various different nonisolated probes/systems, precise characterization of all high-side dynamic electrical parameters, i.e., v_gs, v_ds, and i_d, for the MV SiC mosfet can be achieved. This highlights the significant potential of the PIE OD for next-generation WBG and even ultra-WBG applications.

I. Introduction

The advancement in next-generation wide-bandgap (WBG) semiconductor technologies, along with advanced packaging techniques, has yielded the development of power devices with higher breakdown voltage and faster switching speeds [1]. This enhanced blocking voltage allows for a substantial reduction in the number of cascaded conversion stages required at the same bus voltage, leading to reduced system complexity and higher reliability and density [2], [3]. Additionally, the faster switching speed contributes to lower switching losses, enabling higher switching frequencies, efficiency, as well as power density [4]. Together, these factors contribute to advancing the overall performance of power electronics systems. Nevertheless, along with these advancements come extremely brief switching times, as short as a few nanoseconds, and ultrahigh dv/dt exceeding 100 V/ns, cf. Fig. 1, posing significant challenges for the dynamic testing of the next-generation WBG power devices. Fig. 1.

Blocking voltage, switching time t_r and t_f, and corresponding switching voltage slew rate dv/dt of different types of power devices. Please note that dv/dt includes both turn-ON dv/dt_r and turn-OFF slew rate dv/dt_f.