Frequency-directed run-length (FDR) codes with application to system-on-a-chip test data compression

We showed recently that Golomb codes can be used for efficiently compressing system-on-a-chip test data. We now present a new class of variable-to-variable-length compression codes that are designed using the distributions of the runs of 0s in typical test sequences. We refer to these as frequency-directed run-length (FDR) codes. We present experimental results for the ISCAS 89 benchmark circuits to show that FDR codes outperform Golomb codes for test data compression. We also present a decompression architecture for FDR codes, and an analytical characterization of the amount of compression that can be expected using these codes. Analytical results show that FDR codes are robust, i.e. they are insensitive to variations in the input data stream.

1 Introduction

Test data volume is a major problem encountered in the testing of system-on-a-chip (SOC) designs [1]. A typical SOC consists of several intellectual property (IP) blocks, each of which must be exercised by a large number of precomputed test patterns. The increasingly high volume of SOC test data is not only exceeding the memory and I/O channel capacity of commercial automatic test equipment (ATEs) but it is also leading to excessively high testing times. Data compression techniques that reduce test data volume are therefore of considerable interest.