Contents 1: Analog Computing Arrays
We introduce the use of high density analog computing arrays for signal processing based on nonvolatile semiconductor memory cells. We base this model on an efficient computing paradigm in which highly parallel signal processing computations are performed through analog memory elements based on modified EEPROM cells. The high density analog computing arrays (referred to as computing arrays) require a core memory cells similar to a standard EEPROM or SRAM cell with a small amount of additional circuitry. The enabling technology of this approach is a floating-gate circuit technology that allows for simultaneous storage, computation, and programming in each cell. Unlike digital memory, each cell acts as a multiplier that multiplies the analog input signal to that cell by an analog value stored in a floating gate. By performing the computation in the memory cells themselves we avoid the through-put bottlenecks found in most signal processing systems. We can also extend this computational approach to many other signal processing operations and algorithms in a straightforward manner. The range of applications for computable memories reaches from auditory and speech processing, to beam-forming, multidimensional signal processing, and radar computations, communications processing, and image processing and recognition. We believe that the high density analog computing arrays will be an important option for designers who want to implement advanced signal processing algorithms for embedded and very low-power systems.
