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A General Pulse Width Modulation Method for Zero-Voltage-Switching Active-clamping Three-phase Power Converters: Edge Aligned Pulse Width Modulation (EA-PWM) | IEEE Journals & Magazine | IEEE Xplore

A General Pulse Width Modulation Method for Zero-Voltage-Switching Active-clamping Three-phase Power Converters: Edge Aligned Pulse Width Modulation (EA-PWM)


Abstract:

A general PWM method for soft-switching three-phase power converters-Edge Aligned PWM (EA-PWM) is proposed. It aligns all the high loss commutation instants of the conver...Show More

Abstract:

A general PWM method for soft-switching three-phase power converters-Edge Aligned PWM (EA-PWM) is proposed. It aligns all the high loss commutation instants of the converter bridges in a switching cycle at the same instant so that all the switches of the three-phase converter can realize zero-voltage-switching (ZVS) with the help of the resonant auxiliary circuit which operates once each switching cycle. EA-PWM scheme for ZVS active-clamping three-phase converter is introduced. ZVS condition and voltage stress of the converters is derived. EA-PWM can adapt to various modulation methods such as SPWM, Harmonic Injected SPWM, Continuous Pulse Width Modulation (CPWM), Discontinuous Pulse Width Modulation (DPWM), etc. The ZVS condition of three-phase Compound Active Clamping (CAC) converter are discussed. Finally, EA-PWM scheme is verified in Back-to-Back (BTB) converter prototype.
Published in: IEEE Open Journal of Power Electronics ( Volume: 1)
Page(s): 250 - 259
Date of Publication: 23 July 2020
Electronic ISSN: 2644-1314

Funding Agency:


CCBY - IEEE is not the copyright holder of this material. Please follow the instructions via https://creativecommons.org/licenses/by/4.0/ to obtain full-text articles and stipulations in the API documentation.
SECTION I.

Introduction

Three-phase power converters are widely used in renewable energy generation, motor driving and uninterruptible power supplies, etc. Three-phase power converters suffer from low efficiency due to switching loss of the power semiconductor device when the switching frequency increases, which limits the system power density. Soft-switching technology is an effective approach to eliminate the switching loss of the power semiconductor device.

The DC-side resonant soft-switching converters have the auxiliary branch on the DC side, so generally only one auxiliary branch is required, which means it has simpler structure. The resonant DC-link (RDCL) converter proposed by Divan has a significant impact on the development of the DC-side resonant three-phase power converters [1]. Since the resonant components in RDCL are in the resonant state most of the switching cycle, the peak value of the resonant voltage on the resonant capacitor is as high as twice the DC bus voltage, which causes high voltage stress of the main switch. A modified version, known as active clamping resonant DC-link (ACRDCL) converter is proposed in [2]–​[4] to reduce the voltage stress on the switches by adding a clamping capacitor. Both RDCL and ACRDCL features simple auxiliary circuit structure. However, they all suffer from sub-harmonics in the ac-side waveform due to variable switching frequency. In order to overcome this problem, a quasi-resonant DC-link (QRDCL) soft-switching converter was proposed in [5]. The DC side of QRDCL converter only resonates to zero shortly before the commutation instants of the main switches. Therefore, the main switches can still use SPWM or SVM scheme and the power quality on the load side is increased. However, it has more complicated auxiliary circuit and the auxiliary circuit need to act multiple times in one switching cycle [6]–[10]. [11] proposes a ZVS technique for inverters by using reverse recovery of the diode. In this way, ZVS operation for all switches can be satisfied. But the circuit needs to select a diode with a slow reverse recovery characteristic to ensure that there is enough time to add energy to the resonant inductor to complete the resonant process, which leads to the problem of limited soft switching range.

The auxiliary resonant commutated pole (ARCP) converter achieves zero-voltage turn-on for main switches and zero-current turn-off for auxiliary switch, and SVM scheme is used [12]. However, the DC side split capacitor midpoint voltage needs to be controlled. The inductor coupled ZVT inverter achieves zero-voltage turn-on for main switches and near-zero current turn off for auxiliary switches [13], [14]. DC side split capacitor midpoint voltage control is avoided. The zero-current transition (ZCT) inverter [15] achieves zero current switching for all of the main and auxiliary switches and their anti-parallel diodes. It has a higher resonant current even in the light load, which affects efficiency in the light load. To reduce the switching times of the auxiliary switch, a modified PWM scheme is proposed for delta-configured auxiliary resonant snubber inverter in [16], [17]. It can reduce the number of actions of the auxiliary circuit to two times in each switching cycle. Generally speaking, AC-side resonate three-phase converters have more complex auxiliary circuits in comparison to DC-side resonant converter [18]–​[20].

The ZVS-SVM for three-phase active clamping rectifiers and inverters has been proposed by Xu in [21]–​[23], in which the auxiliary switch only switches once in each switching period to realize ZVS for all the switches. The energy stored in the resonant inductor can be accurately controlled to meet the ZVS conditions under different load situations. In recent years, ZVS-SPWM has been proposed for single-phase inverters and three-phase inverter/rectifier with either 3-wire or 4-wires [24]–​[26]. Meanwhile, the circuit operation principle and ZVS conditions are separately discussed in 3-wire and 4-wire systems according to SPWM and SVM schemes. The ZVS condition for ZVS CAC rectifier and inverter are derived in different load situations. A unified ZVS-PWM method for the three-phase converter has not been studied.

This paper provides a unified PWM method for soft-switching active-clamping three-phase power converters—Edge Aligned PWM (EA-PWM). It can be used in three-phase three-wire, three-phase four-wire inverter/rectifier, and other extensions. It is also suited to different modulation schemes such as SPWM, harmonic-injected PWM, Continuous PWM and Discontinuous PWM, etc. Since EA-PWM aligns all the high loss commutation instants of the converter in a switching period at the same time, the resonant auxiliary circuit only needs to operate once to realize ZVS turn-on for all main switches. ZVS condition and voltage stress of the converters is analyzed. Then the modulation method is extended to soft-switching back-to-back (BTB) converter. Finally, EA-PWM scheme is verified in BTB converter prototype.

SECTION II.

Edge Aligned PWM Method

In three-phase converter, there are two types of switching commutation process. Here takes a switching leg of the converter shown in Fig. 1 as an example. The filter current i_{a} is assumed as positive.

Figure 1. - Two types of switching commutation process. (a) Type 1. (b) Type 2.
Figure 1.

Two types of switching commutation process. (a) Type 1. (b) Type 2.

Switch commutation type 1: It happens when the switch S1 is turned off. The filter current commutates from switch S1 to the antiparallel diode D4 of its complementary switch S4 as shown in Fig. 1(a). The switch (S1) is ZVS turned off with paralleled output capacitor. For Wide-Band-Gap (WBG) device, turn-off loss is much smaller than turn-on loss. Therefore, type 1 commutation need not to take special measure.

Switch commutation type 2: It happens when the switch S1 is turned on. The filter current commutates from the antiparallel diode D4 to its complementary switch S1 as shown in Fig. 1(b). S1 will have turn-on loss and the diode will undergo a reverse recovery process, which causes switching loss in D4 and EMI issue.

The auxiliary circuit can be implemented with CAC or MVAC circuit [21], [22]. The active-clamping ZVS three-phase converter topology is shown in Fig. 2.

Figure 2. - Active-clamping ZVS three-phase converter.
Figure 2.

Active-clamping ZVS three-phase converter.

Typical waveforms of three-phase modulation voltages u_{ma},\,u_{mb},\,u_{mc} and three-phase currents i_{a},\,i_{b},\,i_{c} are depicted in Fig. 3. The switching instant at tset is selected to illustrate the EA-PWM scheme.

Figure 3. - Three-phase filter current waveforms.
Figure 3.

Three-phase filter current waveforms.

The conventional PWM scheme is shown in Fig. 4(a). By comparing the modulation voltages u_{ma},\,u_{mb},\,u_{mc} with the triangular carrier v_{car}, the switch states of each phase can be determined and mid-point voltage u_{aN},\,u_{bN}\,\text{and}\,u_{cN} of the converter can be obtained. All the type 2 commutation instants can be easily identified in each switching period as shown with vertical bold line marks. Actually, whether the type 2 commutation instant will happen in the upper switch or lower switch of the phase leg during each switching cycle is decided by the instant phase current polarity. In order to achieve ZVS of all these type 2 commutation instants, the auxiliary circuit needs to operate three times in one switching period, which will cause higher loss in the auxiliary circuit. Instead, an EA-PWM scheme shown in Fig. 4(b) is proposed to replace the conventional PWM scheme. By changing the triangular carrier to saw-tooth carrier, the sequences of the type 2 commutation instants are rearranged. For the positive filter current phase, the ramp-up carrier v_{car1} is selected. For the negative filter current phase, the ramp-down carrier v_{car2} is selected. In this way, all the type 2 commutation instants will be aligned at the same instant of each switching period. Then the auxiliary resonant circuit only needs to operate once during each switching period and ZVS turn-on can be achieved for all the type 2 commutation instants. It should be noted that the rule of equivalent voltage time-integral principle of PWM modulation in each switching period still holds when changing triangular carrier to saw-tooth carrier in the proposed EA-PWM method.

Figure 4. - Two PWM schemes. (a) Conventional PWM scheme. (b) EA-PWM scheme.
Figure 4.

Two PWM schemes. (a) Conventional PWM scheme. (b) EA-PWM scheme.

For the proposed EA-PWM, the three-phase modulation signals are selected freely, which encompasses sinusoidal, sinusoidal with 3rd harmonic injection and other waveforms. In other words, it can be applied to Continuous PWM or Discontinuous PWM method. EA-PWM is suitable to both three-phase three-wire system and three-phase four-wire system. For generation of PWM signal for each phase, either the ramp-up or ramp-down carrier is selected according to the instant current polarity of its filter phase current. In comparison to the conventional PWM methods, EA-PWM method needs the information of the instant filter current polarities which is used to select either the ramp-up carrier or ram-down carrier. It is the main difference of EA-PWM from traditional PWM method. In general, EA-PWM is not limited by power factors, load current unbalance and distortion as the traditional PWM method.

SECTION III.

EA-PWM ZVS Condition

A. Deduction of EA-PWM ZVS Condition

The ZVS condition for three-phase CAC and MVAC ZVS converter using proposed EA-PWM method is related to the operation condition of the converter. This section gives the unified EA-PWM ZVS condition criterion, which is suitable for different PWM methods and circuit operation conditions. CAC converter is taken as an example to illustrate the ZVS condition deduction.

The key operation waveforms of the circuit in one switching period is given in Fig. 5, which takes the switching instant tset as an example. According to the principle of the EA-PWM scheme, gate signals u_{g1}\sim u_{g6} for each switch can be obtained by comparing its modulation voltage with corresponding carrier signal. During t1t6 (D0Ts), the bus voltage u_{bus} is resonated to zero, all the type 2 commutation instants realize ZVS turn-on simultaneously. While in the rest of the switching period, the converter works as the conventional PWM converter.

Figure 5. - Key waveforms in one switching period.
Figure 5.

Key waveforms in one switching period.

There are two resonant stages in each switching cycle to realize ZVS operation of the main switches and auxiliary switch respectively. The first resonant stage (t1t2) happens when the auxiliary switch S7 is turned off. The dc bus voltage u_{bus} will be resonated to zero at the end of the stage. The circuit state and its simplified circuit are given in Fig. 6.

Figure 6. - The first resonant stage. (a) Circuit state. (b) Simplified circuit.
Figure 6.

The first resonant stage. (a) Circuit state. (b) Simplified circuit.

According to KVL and KCL, with the simplified circuit of the first resonant stage, the following state equation is derived: \begin{equation*} \left\{ {\begin{array}{lll} {\left({{C_{res1}} + {C_{r7}}} \right)\frac{{d{u_{bus}}\left(t \right)}}{{dt}} = {i_{cs1}} - {i_{Lr}}\left(t \right)}\\ {{L_r}\frac{{d{i_{Lr}}\left(t \right)}}{{dt}} = {u_{bus}}\left(t \right) - {V_{dc}}} \end{array}} \right.\tag{1} \end{equation*}

View SourceRight-click on figure for MathML and additional features. where C_{res1}= C_{r1}+ C_{r6}+ C_{r2}= 3C_{r},\,i_{cs1}= -i_{b}-i_{c}. The initial condition of the state variables at t1 can be written as: \begin{equation*} \left\{ {\begin{array}{lll} {{u_{bus}}\left({{t_1}} \right) = {V_{dc}} + {V_{Cc}}}\\ {{i_{Lr}}\left({{t_1}} \right) = {I_{Lr\_t1}}} \end{array}} \right.\tag{2} \end{equation*}
View SourceRight-click on figure for MathML and additional features.

Then the expressions of u_{bus}(t)\,\text{and}\,i_{Lr}(t) can be solved: \begin{align*} \left\{ {\begin{array}{lll} {u_{bus}}\left(t \right)\\ = {V_{dc}} - \sqrt {V_{Cc}^2 + {{\left({{I_{Lr\_t1}} - {i_{cs1}}} \right)}^2}Z_r^2} \sin \left({{\omega _r}\left({t - {t_1}} \right) - {\varphi _1}} \right)\\ {i_{Lr}}\left(t \right) \\= \sqrt {{{\left({{I_{Lr\_t1}} - {i_{cs1}}} \right)}^2} + \frac{{V_{Cc}^2}}{{Z_r^2}}} \cos \left({{\omega _r}\left({t - {t_1}} \right) - {\varphi _1}} \right) + {i_{cs1}} \end{array}} \right.\tag{3} \end{align*}

View SourceRight-click on figure for MathML and additional features. where V_{Cc} is the voltage of clamping capacitor C_{c} and can be regarded as constant in the switching cycle, \omega _{r} is the resonance angular frequency, Z_{r} is the characteristic impedance, and φ1 is the initial angle of the first resonant stage. Some of these key parameters can be expressed as \begin{equation*} \left\{ {\begin{array}{lll} {{\omega _r} = {1 \mathord{\left/ {\vphantom {1 {\sqrt {{L_r}\left({3{C_r} + {C_{r7}}} \right)} }}} \right. \kern-\nulldelimiterspace} {\sqrt {{L_r}\left({3{C_r} + {C_{r7}}} \right)} }}}\\ {{Z_r} = \sqrt {{{{L_r}} \mathord{\left/ {\vphantom {{{L_r}} {\left({3{C_r} + {C_{r7}}} \right)}}} \right. \kern-\nulldelimiterspace} {\left({3{C_r} + {C_{r7}}} \right)}}} }\\ {{\varphi _1} = \arctan \left[ {{{{V_{Cc}}} \mathord{\left/ {\vphantom {{{V_{Cc}}} {{Z_r}\left({{i_{Lr\_t1}} - {i_{cs1}}} \right)}}} \right. \kern-\nulldelimiterspace} {{Z_r}\left({{i_{Lr\_t1}} - {i_{cs1}}} \right)}}} \right]} \end{array}} \right.\tag{4} \end{equation*}
View SourceRight-click on figure for MathML and additional features.

To realize the ZVS turn-on of the main switches, the minimum value of u_{bus}(\text{t}) is required to be less than zero. According to (3), following equation should be satisfied: \begin{equation*} {I_{Lr\_t1}} \geq {i_{cs1}} + {{\sqrt {{V_{dc}}^2 - {V_{Cc}}^2} } \mathord{\left/ {\vphantom {{\sqrt {{V_{dc}}^2 - {V_{Cc}}^2} } {{Z_r}}}} \right. \kern-\nulldelimiterspace} {{Z_r}}}\tag{5} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

The second resonant stage happens during (t5t6) when the voltage across the auxiliary switch u_{Cr7} resonates to 0. It provides the ZVS turn-on condition for the auxiliary switch S7. The circuit state and its simplified circuit are given in Fig. 7.

Figure 7. - The second resonant stage. (a) Circuit state. (b) Simplified circuit.
Figure 7.

The second resonant stage. (a) Circuit state. (b) Simplified circuit.

Similarly, following state equation is derived for the second resonant stage: \begin{equation*} \left\{ {\begin{array}{lll} {\left({{C_{res2}} + {C_{r7}}} \right)\frac{{d{u_{Cr7}}\left(t \right)}}{{dt}} = {i_{Lr}}\left(t \right) - {i_{cs2}}}\\ {{L_r}\frac{{d{i_{Lr}}\left(t \right)}}{{dt}} = {V_{Cc}} - {u_{Cr7}}\left(t \right)} \end{array}} \right.\tag{6} \end{equation*}

View SourceRight-click on figure for MathML and additional features. where C_{res2}= C_{r4}+ C_{r3}+ C_{r5}= 3C_{r},\,i_{cs2}= -i_{a}. The initial condition of equation (6) at t5 is: \begin{equation*} \left\{ {\begin{array}{lll} {{i_{Lr}}\left({{t_5}} \right) = {i_{cs2}} - {i_{add}}}\\ {{u_{Cr7}}\left({{t_5}} \right) = {V_{dc}} + {V_{Cc}}} \end{array}} \right.\tag{7} \end{equation*}
View SourceRight-click on figure for MathML and additional features.

i_{add} is the extra current added to i_{Lr} through a shorting stage (t4t5) in Fig. 5. By solving (6), the expression for u_{Cr7}(t)\,\text{ and } i_{Lr}(t) during the second resonant stage can be obtained: \begin{equation*} \left\{ {\begin{array}{lll} {{u_{Cr7}}\left(t \right) = {V_{Cc}} - \sqrt {V_{dc}^2 + Z_r^2i_{add}^2} \sin \left({{\omega _r}\left({t - {t_5}} \right) - {\varphi _2}} \right)}\\ {{i_{Lr}}\left(t \right) = {i_{cs2}} - \sqrt {i_{add}^2 + \frac{{V_{dc}^2}}{{Z_r^2}}} \cos \left({{\omega _r}\left({t - {t_5}} \right) - {\varphi _2}} \right)} \end{array}} \right.\tag{8} \end{equation*}

View SourceRight-click on figure for MathML and additional features. where φ2 is the initial angle of the second resonant stage, which can be expressed as \begin{equation*} {\varphi _2} = \arctan \frac{{{V_{dc}}}}{{{Z_r}{i_{add}}}}\tag{9} \end{equation*}
View SourceRight-click on figure for MathML and additional features.

To realize the ZVS turn-on of the auxiliary switch S7, u_{Cr7} should be resonated to 0 and the following inequality should be satisfied: \begin{equation*} {V_{Cc}} - \sqrt {V_{dc}^2 + Z_r^2i_{add}^2} \leq 0\tag{10} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

As VCc is far less than Vdc, the above equation is always satisfied, which means the ZVS turn-on for auxiliary switch S7 is always realized.

The resonant inductor current i_{Lr}(t_{6}) can be calculated through equation (8) with u_{Cr7}(t_{6})= 0: \begin{equation*} {i_{Lr}}\left({{t_6}} \right) = {i_{cs2}} - \sqrt {\frac{{{V_{dc}}^2 - {V_{Cc}}^2}}{{Z_r^2}} + i_{add}^2}\tag{11} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

When the circuit works in steady state, the resonant inductor L_{r} satisfies the voltage-second balance principle in a switching cycle. The following equation is formulated by neglecting two short resonant stages in Fig. 5: \begin{equation*} \int_{0}^{{{T_s}}}{{{v_{Lr}}}}\left(t \right)dt = {V_{Cc}}\left({1 - {D_0}} \right){T_s} - {V_{dc}}{D_0}{T_s} = 0\tag{12} \end{equation*}

View SourceRight-click on figure for MathML and additional features. where D0 is the turn-off duty cycle of the auxiliary switch S7. Then the voltage stress of all the switches can be represented by: \begin{equation*} {V_{str}} = {V_{dc}} + {V_{Cc}} = \frac{1}{{1 - {D_0}}}{V_{dc}}\tag{13} \end{equation*}
View SourceRight-click on figure for MathML and additional features.

The clamping capacitor Cc should also obey the ampere-second balance principle in one switching period. The current of the clamping capacitor is same as i_{S7} in Fig. 5. Neglecting the short durations in one switching cycle such as resonant stages and three type 1 commutation instants, the average current of the clamping capacitor in one switching period is approximated by: \begin{align*} \int_{0}^{{{T_s}}}{{{i_{S7}}dt \approx }}\ &\int_{{{t_1}}}^{{{t_6}}}{{{i_{S7}}(t)dt}} + \int_{{{t_6}}}^{{{t_7}}}{{{i_{S7}}(t)dt}} + \int_{{{t_8}}}^{{{t_9}}}{{{i_{S7}}(t)dt}}\\ & + \int_{{{t_{10}}}}^{{{t_{11}}}}{{{i_{S7}}(t)dt + \int_{{{t_{12}}}}^{{{t_{13}}}}{{{i_{S7}}(t)dt}}}} = 0 \tag{14} \end{align*}

View SourceRight-click on figure for MathML and additional features.

The duration of different stages in (14) is decided by the duty cycle of each phase d_{a},\,d_{b}\,\text{and}\,d_{c}, which is decided by both its modulation voltage u_{ma},\,u_{mb},\,u_{mc} and the turn-off duty cycle of the auxiliary switch D0.

Due to the existence of D0, the duty cycle of the ZVS converter is slightly different from those in the hard-switching converter. For the phase with positive filter current, such as phase A, the average value of u_{an} in a switching period meet the following equation according to Fig. 8: \begin{equation*} {\left\langle {{u_{an}}} \right\rangle _{{T_s}}} \!=\! \left(\!{V_{Cc}} + \frac{{{V_{dc}}}}{2}\!\right)({d_a} - {D_0}) - \frac{{{V_{dc}}}}{2}(1 - {d_a} + {D_0}) = {u_{ma}}\tag{15} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

Figure 8. - Waveform of $u_{an}$ with consideration of D0.
Figure 8.

Waveform of u_{an} with consideration of D0.

For the phase with negative filter current, such as phase B, its average value of u_{bn} in a switching period meet the following equation according to Fig. 9: \begin{equation*} {\left\langle {{u_{bn}}} \right\rangle _{{T_s}}} = \left({V_{Cc}} + \frac{{{V_{dc}}}}{2}\right){d_b} - \frac{{{V_{dc}}}}{2}(1 - {d_b}) = {u_{mb}}\tag{16} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

Figure 9. - Waveform of $u_{bn}$ with consideration of D0.
Figure 9.

Waveform of u_{bn} with consideration of D0.

Therefore, the duty cycle of each phase can be written as: \begin{equation*} \left\{ {\begin{array}{lll} {{d_a} = \left({\frac{1}{2} + \frac{{{u_{ma}}}}{{{V_{dc}}}}} \right)(1 - {D_0}) + {D_0}}\\ {{d_b} = \left({\frac{1}{2} + \frac{{{u_{mb}}}}{{{V_{dc}}}}} \right)(1 - {D_0})}\\ {{d_c} = \left({\frac{1}{2} + \frac{{{u_{mc}}}}{{{V_{dc}}}}} \right)(1 - {D_0})} \end{array}} \right.\tag{17} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

The current i_{S7} at t6 meet the following equation: \begin{equation*} {i_{S7}}\left({{t_6}} \right) = - \sqrt {\frac{{{V_{dc}}^2 - {V_{Cc}}^2}}{{Z_r^2}} + i_{add}^2}\tag{18} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

During t1∼t6, the auxiliary switch is turned off, iS7 equals 0. In the rest time of the switching cycle, iS7 increases with a constant rate of VCc/Lr. When the type 1 commutation instant happens, iS7 will have a reduction of the corresponding filter current value. Fig. 10 shows the typical waveform of iS7. Then the ampere-second balance equation for the clamping capacitor in (14) can be rewritten as: \begin{align*} \int_{0}^{{{T_s}}}{{{i_{S7}}dt \approx }}\ &\int_{{{t_6}}}^{{{t_{13}}}}{{\left[ {{i_{S7}}({t_6}) + \frac{{{V_{Cc}}}}{{{L_r}}}t} \right]dt}} + \int_{{{t_8}}}^{{{t_{13}}}}{{{i_b}dt}}\\ & + \int_{{{t_{10}}}}^{{{t_{13}}}}{{{i_c}dt + \int_{{{t_{12}}}}^{{{t_{13}}}}{{\left({ - {i_a}} \right)dt}}}} = 0 \tag{19} \end{align*}

View SourceRight-click on figure for MathML and additional features.

Figure 10. - Waveform of $i_{S7}$.
Figure 10.

Waveform of i_{S7}.

By substituting the duty cycles into (19), the turn-off duty cycle D0 for the auxiliary switch S7 can be obtained: \begin{equation*} \scriptstyle{{D_0} = \frac{{2{L_r}\left({ - \frac{{{i_b}{u_{mb}}}}{{{V_{dc}}}} - \frac{{{i_c}{u_{mc}}}}{{{V_{dc}}}} - \frac{{{i_a}{u_{ma}}}}{{{V_{dc}}}} + \frac{{{i_a}}}{2} - \frac{{{i_b}}}{2} - \frac{{{i_c}}}{2} + \sqrt {\frac{{{V_{dc}}^2 - {V_{Cc}}^2}}{{Z_r^2}} + i_{add}^2} } \right)}}{{{V_{dc}}{T_s}}}}\tag{20} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

The resonant inductor current i_{Lr} meet the following equation: \begin{equation*} {i_{Lr}}({t_1}) - {i_{Lr}}({t_6}) = \frac{{{V_{dc}}}}{{{L_r}}}{D_0}{T_s}\tag{21} \end{equation*}

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By combining (11), (20) and (21), ZVS condition for the first resonant stage in (5) can be obtained: \begin{equation*} {i_{Lr}}\left({{t_1}} \right) = \sqrt {\frac{{{V_{dc}}^2 - {V_{Cc}}^2}}{{Z_r^2}} + i_{add}^2} + 2{i_M} \geq \frac{{\sqrt {{V_{dc}}^2 - {V_{Cc}}^2} }}{{{Z_r}}}\tag{22} \end{equation*}

View SourceRight-click on figure for MathML and additional features. where i_{M} is defined as: \begin{equation*} {i_M} = - \frac{{{i_a}{u_{ma}}}}{{{V_{dc}}}} - \frac{{{i_b}{u_{mb}}}}{{{V_{dc}}}} - \frac{{{i_c}{u_{mc}}}}{{{V_{dc}}}}\tag{23} \end{equation*}
View SourceRight-click on figure for MathML and additional features.

It can be concluded from (22) that when i_{M}> 0, ZVS condition is always satisfied and no extra current i_{add} is needed. Meanwhile, an extra current i_{add} is needed when i_{M}< 0. Therefore, i_{add} can be expressed as: \begin{equation*} {i_{add}} = \left\{ \begin{array}{ll} 0&{\rm{ }}{i_M} \geq 0\\ \sqrt {{{\left({\frac{{\sqrt {{V_{dc}}^2 - {V_{Cc}}^2} }}{{{Z_r}}} - 2{i_M}} \right)}^2} - \frac{{{V_{dc}}^2 - {V_{Cc}}^2}}{{Z_r^2}}} & {i_M} < 0 \end{array} \right.\tag{24} \end{equation*}

View SourceRight-click on figure for MathML and additional features.

The ZVS condition in (22) can be applied for different phase current polarity situations with CPWM modulation scheme. Meanwhile, when DPWM modulation scheme is used, the current source i_{cs1}\,\text{and}\,i_{cs2} in Fig. 6 and Fig. 7 will be different due to the clamping phase leg in DPWM scheme. Using the same derivation process, the same ZVS condition can also be obtained as in (22). But the expression of i_{M} is different between CPWM and DPWM scheme. Considering both CPWM and DPWM schemes, the expression of i_{M} in (23) can be unified as \begin{equation*} {i_M} = \frac{{\sum\limits_{i = a,b,c} {{u_{mi}}{i_i}{k_i}} }}{{{V_{dc}}}} \geq 0,{k_i} = \left\{ {\begin{array}{lll} {0 \;\text{if}\left| {{u_{mi}}} \right| = \frac{{{V_{dc}}}}{2}}\\ { - 1\;\text{otherwise}} \end{array}} \right.i = a,b,c\tag{25} \end{equation*}

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It should be noted that for three-phase four-wire system and other N-bridge ZVS circuit topologies, similar ZVS condition criterion in (25) and expression for i_{add} in (24) is also applicable according to similar deduction process.

B. Discussion of ZVS Condition

Equation (24) shows that the polarity of i_{M} will influence the extra added current i_{add}. The expression of i_{M} in (25) indicates that the polarity of i_{M} is related to load currents, modulation voltages and different PWM methods. To analyze the impact of different operation conditions on the ZVS condition, the following assumption of three-phase modulation voltages and ac side currents in three-phase three-wire systems are made: \begin{align*} &\left\{ {\begin{array}{lll} {{u_{ma}}\left(t \right) = {U_m}\sin \left({\omega t} \right) + {u_z}}\\ {{u_{mb}}\left(t \right) = {U_m}\sin \left({\omega t - {{2\pi } \mathord{\left/ {\vphantom {{2\pi } 3}} \right. \kern-\nulldelimiterspace} 3}} \right) + {u_z}}\\ {{u_{mc}}\left(t \right) = {U_m}\sin \left({\omega t + {{2\pi } \mathord{\left/ {\vphantom {{2\pi } 3}} \right. \kern-\nulldelimiterspace} 3}} \right) + {u_z}} \end{array}} \right.,\\ &\left\{ {\begin{array}{lll} {{i_a}\left(t \right) = {I_m}\sin \left({\omega t + \theta } \right)}\\ {{i_b}\left(t \right) = {I_m}\sin \left({\omega t + \theta - {{2\pi } \mathord{\left/ {\vphantom {{2\pi } 3}} \right. \kern-\nulldelimiterspace} 3}} \right)}\\ {{i_c}\left(t \right) = {I_m}\sin \left({\omega t + \theta + {{2\pi } \mathord{\left/ {\vphantom {{2\pi } 3}} \right. \kern-\nulldelimiterspace} 3}} \right)} \end{array}} \right.\tag{26} \end{align*}

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Where U_{m} is the amplitude of the phase modulation voltage, u_{z} is the zero sequence voltage component. I_{m} is the amplitude of the phase currents. θ is the power factor angle. The discussion of the ZVS condition can be classified by CPWM or DPWM scheme in three-phase three-wire system.

In CPWM scheme, three-phase modulation voltages meet: \begin{equation*} \left| {{u_{ma}}\left(t \right)} \right| \ne \frac{{{V_{dc}}}}{2},\left| {{u_{mb}}\left(t \right)} \right| \ne \frac{{{V_{dc}}}}{2},\left| {{u_{mc}}\left(t \right)} \right| \ne \frac{{{V_{dc}}}}{2}\tag{27} \end{equation*}

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By combining (23) and (26), the expression of i_{M} in CPWM scheme can be obtained: \begin{equation*} {i_M} = - \frac{{{u_{ma}}{i_a} + {u_{mb}}{i_b} + {u_{mc}}{i_c}}}{{{V_{dc}}}} = - \frac{3}{2}\frac{{{U_m}{I_m}\cos \theta }}{{{V_{dc}}}}\tag{28} \end{equation*}

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It can be concluded that in CPWM scheme, the polarity of i_{M} is only related to θ. When θ ∈ [−π/2, π/2], the converter works in inverter modes, i_{M} is always negative, then an constant i_{add} is needed to realize ZVS condition. When θ ∈ [π/2, 3π/2], the converter works in rectifier mode, i_{M} is always positive, no extra current i_{add} is needed.

In three-phase three-wire system, DPWM scheme can be adopted using a particular zero sequence voltage u_{z}. Taking the DPWM scheme with six clamping regions in one fundamental period shown in Fig. 11 as an example to analyze the ZVS condition.

Figure 11. - Three-phase modulation voltages using DPWM.
Figure 11.

Three-phase modulation voltages using DPWM.

The expression for i_{M} in six regions is given in Table I, M is the modulation index, which meets M= 2U_{m}/ V_{dc}. It can be seen that the polarity of i_{M} is related to the power factor angle θ and the modulation index M. Besides, the polarity of i_{M} will also change at different regions of the fundamental period.

Table I Expression of i_{M} at Six Regions
Table I- Expression of $i_{M}$ at Six Regions

In DPWM scheme, when the converter works in inverter mode (θ ∈ [−π/2, π/2]), cos θ is positive. Therefore, a larger modulation index M will result in a smaller i_{M}, which means the larger the modulation index M is, it is more likely that an extra current i_{add} will be needed. When the converter works under unit power factor (θ = 0), it can be obtained that i_{M} will be positive in all the regions as long as M is less than{{\sqrt 3 } \mathord{/ {\vphantom {{\sqrt 3 } 3}} \kern-\nulldelimiterspace} 3}. Fig. 12 shows i_{M} under different modulation index M at θ = 0, where i_{M} is normalized to Im.

Figure 12. - $i_{M}$ under different modulation index M at θ = 0.
Figure 12.

i_{M} under different modulation index M at θ = 0.

Fig. 13 shows the i_{M} value under different modulation index M at θ = −π/3 and θ = π/3. It can be seen that the polarity of i_{M} will alternate in the fundamental period. In the region i_{M}< 0, an extra current i_{add} should be added to realize the ZVS condition.

Figure 13. - $i_{M}$ under different modulation index M at θ = −π/3 and θ = π/3.
Figure 13.

i_{M} under different modulation index M at θ = −π/3 and θ = π/3.

When the converter works in rectifier mode (θ ∈ [π/2, 3π/2]), cosθ is negative. The larger the modulation index M is, the larger i_{M} will be, which means it will be easier for the first resonant stage to realize ZVS operation. Similarly, Fig. 14 shows i_{M} under different modulation index M at unit power factor (θ = π). It can be obtained that when M is larger than 2/3, i_{M} will be positive in all the fundamental period, and no extra current i_{add} is needed.

Figure 14. - $i_{M}$ under different modulation index M at θ = π.
Figure 14.

i_{M} under different modulation index M at θ = π.

Fig. 15 shows i_{M} under different modulation index M at θ = 2π/3 and θ = 4π/3.It can be seen that when M equals its maximum value 1.15, i_{M} is always positive for both power factor angle. As M decreases, the polarity of i_{M} will alternate in the fundamental period, extra current i_{add} is also needed in the region i_{M}< 0. Similarly, when the power factor angle decrease to θ ∈ [5π/6, 7π/6], the critical modulation index M equals to 0.77.

Figure 15. - $i_{M}$ under different modulation index M at θ = 2π/3 and θ = 4π/3.
Figure 15.

i_{M} under different modulation index M at θ = 2π/3 and θ = 4π/3.

C. Implementation of EA-PWM Scheme

Fig. 16 shows the control diagram of the ZVS CAC converter using the proposed EA-PWM. The main current or voltage control strategy is same with the conventional converter. The EA-PWM generator shows the generation of seven driving signals ug1∼ug7 of the switch S1∼S7. The polarity information of the current reference signals i_{a}^\ast,\,i_{b}^\ast \,\text{and}\,i_{c}^\ast are used to determine the PWM alignment style, which is much more smooth than using the sampled filter current to avoid the zero-crossing jittering. The extra current i_{add} is realized by performing a logical OR operation between the short-circuit signal u_{gst} with the driving signal of the main switches. u_{gst}\, is generated by comparing Dadd with the ramp-up saw-tooth carrier. Dadd can be written as: \begin{equation*} {D_{add}} = \frac{{{i_{add}}{L_r}}}{{{V_{dc}}}}\tag{29} \end{equation*}

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Figure 16. - Control diagram of three-phase ZVS CAC converter.
Figure 16.

Control diagram of three-phase ZVS CAC converter.

For other ZVS CAC converter topologies, similar EA-PWM scheme implementation approach can also be applied.

SECTION IV.

Experimental Verification

To verify the EA-PWM scheme and its ZVS condition, a 9kW three-phase four-wire back-to-back CAC converter shown in Fig. 17 is built. The system parameters are listed in Table II [27].

Figure 17. - Three-phase four-wire BTB ZVS converter.
Figure 17.

Three-phase four-wire BTB ZVS converter.

Table II System Parameters
Table II- System Parameters

Fig. 18 shows EA-PWM scheme for the BTB CAC converter when i_{ai}< 0, i_{bi}> 0, i_{ci}> 0, i_{ao}> 0, i_{bo}> 0, i_{co}< 0, all the six type2 commutation instants in six bridges are aligned at the beginning of the switching period. For BTB CAC converter, when the inverter side is feeding three-phase balanced load, i_{M} equals 0, and no extra current i_{add} is needed. Meanwhile, when the inverter is feeding unbalanced load, the polarity of i_{M} will alternate in the fundamental period and extra current i_{add} is needed in the region i_{M}< 0.

Figure 18. - EA-PWM scheme for BTB converter.
Figure 18.

EA-PWM scheme for BTB converter.

Fig. 19 shows the ZVS operation waveforms for the main switches and auxiliary switch at 9kW balanced load situation. It can be seen that when the driving signal of the auxiliary switch u_{g7} is turned off, the bus voltage u_{bus} is resonated to zero and the voltage of the auxiliary switch u_{C7} is resonated to Vdc + VCc at the same time. All the six switches can realize ZVS turn-on simultaneously. After a turn-off duty cycle of D0, the voltage of the auxiliary switch u_{C7} is resonated to 0, and the bus voltage u_{bus} is resonated to Vdc + VCc, which provides the ZVS condition for the auxiliary switch S7.

Figure 19. - Waveform of ZVS operation
Figure 19.

Waveform of ZVS operation

Fig. 20 shows the loss and efficiency comparison between the hard-switching BTB converter and the ZVS BTB converter. At half load situation, the ZVS BTB has a loss reduction of 113W. It can be seen that the turn-on loss in the hard-switching converter can be totally eliminated. The experimental efficiency is 94.3% for the hard-switching BTB converter, and 97.5% for the soft-switching BTB converter. At full load situation, the ZVS BTB converter has a total loss of 262W comparing to 550W for the hard-switching converter, which means the ZVS BTB converter has a 3% higher efficiency than the conventional hard-switching converter at full load. The experimental efficiency for the soft-switching BTB converter is 97.1%.

Figure 20. - Loss and efficiency comparison of hard-switching and soft-switching converter.
Figure 20.

Loss and efficiency comparison of hard-switching and soft-switching converter.

SECTION V.

Conclusion

The proposed EA-PWM can be used for 3-phase 3-wire or 3-phase 4-wire systems and other combination ZVS converter with different modulation methods and different load power factor. The unified ZVS condition shows that the modulation index and power factor angle will impact the ZVS operation condition. When the converter operates with CPWM scheme in the rectifier mode, no extra added current is needed and the ZVS condition is easier to be satisfied. However, it needs extra added current for the resonant inductor in the inverter mode. With regards to most case with DPWM scheme, an extra current is needed to boost resonant inductor current to realize ZVS operation. Only in certain condition in the rectifier mode with a high modulation index, there is no requirement for extra added current for the resonant inductor. Finally, the proposed EA-PWM method is verified with a three-phase four-wire BTB converter. The ZVS BTB converter has a 3% higher efficiency than the conventional hard-switching converter at full load with 150 kHz switching frequency.

References

References is not available for this document.