A Picosecond-Resolution Digitally-Controlled Timing Generator With One-Clock-Latency at Arbitrary Instantaneous Input

This brief presents an open-loop all-digital burst-mode digital-to-time converter (DTC). The output timing is converted in one-clock latency in response to any instant change of input which is a time range with a digital code. The given time range is coarsely estimated using a ring oscillator based edge-counting. It is then processed with a self-referenced phase interpolation which greatly reduces the actual input range for interpolation and achieves a good linearity in the whole conversion range. The implemented DTC in 28nm LP CMOS shows the maximum peak INL error of 5.34ps in a seamless conversion range of from 16ps to 2850ps.

I. Introduction

Digital-to-time converter (DTC) has been widely used for timing generation in building various blocks including digital pulse-width modulators, fine delay adjustments for time-to-digital converters, digital phase-locked loop, clock and data recovery and range sensing systems. Fine resolution with a good linearity in a wide conversion range is the ultimate goal of the DTCs. Employing a phase interpolator (PI) has been the general approach [1]–[5]. But processing by weighted averaging in voltage domain requires a significant overlap in transition period between two phases, hence limits the conversion range. Vernier time step obtained from two phase-locked loops (PLLs) can be considered for a resolution of picoseconds, but at the cost of significant power [6], [7]. Fine resolution in a wide range has been also achieved using coarse/fine approach which divides the conversion range with a multiphase PLL or delay-locked loop (DLL) and performs a post-processing with an interpolator [8], [9]. Though the state-of-the-art works reported a picosecond resolution in a conversion range of nanosecond, all of them necessitate a multiphase-supporting assistant such as PLL or DLL which requires a long startup time for the lock.