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A 4TX/4RX Pulsed Chirping Phased-Array Radar Transceiver in 65-nm CMOS for X-Band Synthetic Aperture Radar Application | IEEE Journals & Magazine | IEEE Xplore

A 4TX/4RX Pulsed Chirping Phased-Array Radar Transceiver in 65-nm CMOS for X-Band Synthetic Aperture Radar Application


Abstract:

A pulsed chirping phased-array transceiver (TRX) is demonstrated for X-band synthetic aperture radar (SAR) application. The phased-array TRX is implemented on a single CM...Show More

Abstract:

A pulsed chirping phased-array transceiver (TRX) is demonstrated for X-band synthetic aperture radar (SAR) application. The phased-array TRX is implemented on a single CMOS chip with beamsteering/beamforming capabilities. The chip-scale radar TRX is composed of four transmitters (TXs) and four receivers (RXs) operating at 10-GHz center frequency with 1-GHz bandwidth (BW). To achieve the wideband beamsteering with a fine angle step, the two-stage delay control in the TX is proposed, where a delay-locked loop (DLL) -based multi-phase synthesizer (MPS) is used to control the coarse true-time delay of the baseband chirp, and the active phase shifters (PS) in radio frequency (RF) path are used for fine phase tuning. Fabricated in a 65-nm CMOS technology, the TRX consumes 228 mW for each channel at a 1.2-V supply, delivering ~10.2-dBm power with <1.3-dB ripple. The delay-line test shows that the dechirped signal achieves −13-dB peak-to-sidelobe ratio (PSLR) and the phase coherence error is within ±1.2° at a chirp rate of 1 MHz/ \mu \text{s} . The prototype phased-array radar TRX chip is demonstrated with the antenna arrays consisting of Vivaldi antennas of 8-dBi gain, 6-GHz BW, and 6-cm pitch distance. Experiments indicate that beamsteering/beamforming up to ±60° with a step of ~1° is achieved. SAR imaging experiment is carried out based on both the two-stage beamsteering in the TXs and the digital beamforming in the RXs, proving the capability of the prototype phased-array radar TRX chip for the SAR imaging applications.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 55, Issue: 11, November 2020)
Page(s): 2970 - 2983
Date of Publication: 13 July 2020

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I. Introduction

Synthetic aperture radar (SAR) is a technique feasible for creating high-resolution images of Earth’s surface and remote objects. Airborne or spaceborne SAR targeted for micro-unmanned aerial vehicle (UAV) or micro-satellite becomes capable of observing large area under all weather conditions with strong penetrations and finds many emerging applications in defense, geology, urban, oceanography, agriculture, others, etc. [1], [10]. An SAR system can be operated in various modes. The simplest acquisition mode is the strip-map mode, where the radar antenna beam is fixed. For other modes, the radar antenna can be steered in both azimuth and elevation directions. The steering can be realized mechanically or electrically. Through this steering, higher azimuth resolution, longer or wider swath coverage can be achieved. Phased-array SAR, operating in three modes of spotlight, strip map, and scan SAR, can significantly improve the spatial resolution and detection of signal-to-noise ratio (SNR) by steering the beams mechanically or electronically to the targets [11]–[14]. Many modern phased-array radar transceiver (TRX) systems consist of hundreds of transmitting and receiving discrete modules, which are still constrained by power, size, and reliability for the payload in micro-UAVs or micro-satellites. It is much preferred to develop a cost- and power-effective system which integrates multiple channels of transmitters (TXs) and receivers (RXs) in a compact chip. The performance of the current phased-array radar TRX is mainly determined by the performance of the TX/RX modules that are typically implemented in GaAs- and InP-based implementation, especially at X-band or higher frequencies [15]–[17]. In [16], two monolithic microwave integrated circuit (MMIC) driver amplifiers and an MMIC high-power amplifier (HPA) are implemented in a 2- GaInP-GaAs heterojunction bipolar transistor (HBT) technology. The drivers exhibit small-signal gains exceeding 21-dB and output powers of about 28 and 29 dBm in a 2-GHz bandwidth (BW) and control word (CW) condition, respectively. The HPA delivers more than 40-dBm power at about 2.5-dB gain compression and power-added efficiency (PAE) exceeding 36%. However, the power consumption of the drivers and the HPA are larger than 1.5 up to 12 W, and the dimensions are larger than 6 up to 24.75 mm2. An X-band AlGaAs/InGaAs/GaAs PHEMT MMIC PA is demonstrated in [17], and it achieves an output power of 39.3 dBm and a PAE of 33.7% at 8-V power supply. However, it has to be noted that the chip size is 10.89 mm2 and the power consumption is ~10 W, which is costly in manufacturing and deployment for the X-band phased-array radar TRXs. Therefore, low-cost, lightweight, compact-size, and highly integrated TRXs for future X-band phased-array radar systems are required to reduce all these expenses. With the recently rapid advances in silicon-based technology, scalable CMOS/BiCMOS process has been considered as an excellent candidate to build the next-generation X-band phased-array TRX on a single chip. These technologies can enable the compact integration level of radio frequency (RF) circuits with digital baseband (BB) circuitry of phased arrays at much lower cost compared to the solutions based on III–V semiconductors. Therefore, the design of the building blocks of radar TRX based on CMOS or BiCMOS technology has become an active research area in recent years [2]–[9], [14], [18]–[26].

References

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