The AMD “Zen 2” Processor

The “Zen 2” processor is designed to meet the needs of diverse markets spanning server, desktop, mobile, and workstation. The core delivers significant performance and energy-efficiency improvements over “Zen” by microarchitectural changes including a new TAGE branch predictor, a double-size op cache, and a double-width floating-point unit. Building upon the core design, a modular chiplet approach provides flexibility and scalability up to 64 cores per socket with a total of 256 MB of L3 cache.

The Zen 2 processor provides a single core design that is leveraged by multiple solutions, with focused goals for improving upon the predecessor Zen processor. The primary targets for the core were advancements in instructions per cycle (IPC), energy efficiency, and security. Building on the new core, the solutions for server and client aimed to promote design reuse across markets, increase core count, and improve IO capability. Achieving these goals required innovations in microarchitecture, process technology, chiplets, and on-package interconnect.