Online Safety Checking for Delay Locked Loops via Embedded Phase Error Monitor

In today's automotive ICs, online safety checking is often required in order to achieve a high Automotive Safety Integrity Level (ASIL). For a Delay-Locked Loop (DLL), the most important safety (or health) indicator is the “phase error between the input clock signal and the output clock signal”. In this paper, we present a phase error monitoring scheme for DLLs, using circuits made of only standard cells. The proposed scheme can monitor the phase error continuously to record its worst-case values during a designated monitoring session. As a result, hazardous phase error glitches can be exposed and an alarm can be raised. We have implemented this monitoring scheme for a Delay Lock Loop in a 90 nm CMOS process and post-layout simulation is conducted to verify its effectiveness. Experimental results show that it can help expose hazards induced by dynamic power glitches that occurs within 1ns.

I. Introduction

In today's automotive ICs, the functional safety is of paramount importance. As defined in ISO-26262 [1], it targets “the absence of unreasonable risk due to hazards caused by malfunctioning behaviors of E/E systems”. To achieve this goal, safety mechanisms are often employed in the system to minimize the safety risk in case a system failure does occur. In the meantime, a nearly zero failure rate is required over a designated lifetime span for each safety-critical electronic component. This grand objective implies that, not only a “nearly zero defect level” needs to be targeted during the manufacturing test, various fault tolerance and online error masking techniques are inevitable to cope with sporadic soft errors induced by various sources, such as radiation, or PVTA (Process, Voltage, Temperature, and Ageing) effects. Moreover, some automotive ICs supporting self-driving could have a wide-ranging power consuming behavior due to the need of online high- performance computing, and thus there may be a greater chance to induce significant power glitches from time to time.