I. Introduction
Electromagnetic compatibility (EMC) and electromagnetic immunity (EMI) testing are becoming major requirements to ensure proper operation of increasingly complex integrated circuits (ICs) [1], [2]. Particularly, to counteract the ever increasing clock speeds and switching currents, the reduction in voltage supply lowers the noise margin of digital circuitry and consequently IC susceptibility [3]. Therefore, EM interference can cause catastrophic failures in microcontrollers (μCs) which, incidentally, play a major role in embedded systems [4]. This has led the EMC/EMI regulatory commissions (e.g. international electrotechnical commission IEC [5]) to define procedures to assess the EM immunity of ICs.