Abstract:
Ten years after the publication of the EC Directive 89/336, research and development related to electromagnetic compatibility have covered many aspects in the design and ...Show MoreMetadata
Abstract:
Ten years after the publication of the EC Directive 89/336, research and development related to electromagnetic compatibility have covered many aspects in the design and development of electrical and electronic equipment. Different solutions regarding these problems were presented in recent years, in order to minimize the electromagnetic interference, but new and innovative solutions are still being studied. In this paper, the authors show to what extent electromagnetic interference caused by power electronic circuits can be minimized with the use of planar busbars. Indeed, the goal is to tackle EMI directly at the source where most EMI is generated by proper design of the inverter busbars. A planar busbar design was made and implemented, Measurements show the validity of the theoretical approach.
Published in: 2000 IEEE 31st Annual Power Electronics Specialists Conference. Conference Proceedings (Cat. No.00CH37018)
Date of Conference: 23-23 June 2000
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-5692-6
Print ISSN: 0275-9306
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1.
Redl, "Power Electronics and Electromagnetic Compatibility", Conf.Rec.PESC '96, pp. 15-21, 1996-June.
2.
L. Julian, T. A. Lipo and G. Oriti, "Elimination of Common Mode Voltage in Three Phase Sinusoidal Power Converters", Conf. Proc.PESC 1996, pp. 1968-1972.
3.
G. Oriti, A. L. Julian and T.A. Lipo, "A New Space Vector modulation Strategy for Common Mode Voltage Reduction", Conf. Proc.PESC 1997, pp. 1541-1546.
4.
S. Ogasawaea, H. Ayano and H. Akagi, "An Active Circuit for Cancellation of Common-Mode Voltage generated by a PWM Inverter", Conf. Proc. PESC 1997, pp. 1541-1546.
5.
S. van Acker, "Laminated Busbars and Excor Key Components for Controlled Power Distribution in High Power Applications", Conf.Rec.PCIM 1996, pp. 699-706, 1996-May.
6.
G. Skibinski and D. M. Divan, "Design Methodology & Modelling of Low Inductance Planar Bus structures", Conf. Rec. EPE'93, pp. 98-105, 1993-September.
7.
C. A. Dimino, R. Dodballapur and J. A. Pomes, "A Low Inductance Simplifield Snubber Power inverter Implementation", Conf.Rec. HF PC '94, pp. 502-509, 1994-April.
8.
R. A. Lewis and J. L. Hudgins, "The Effects Due to the Package of a PEBB-1 Module in an ARCP Circuit", Conf.Rec. PESC'98, pp. 1951-1956, 1998-May.
9.
B. Beker, J. L. Hudgins, J. Coronati, B. Gillet and S. Shekhawat, "Extraction of Parasitic Circuit Elements in a PEBB for Application in the Virtual Test Bed", Conf.Rec.IAS'97, pp. 1217-1221, 1997-October.
10.
M.C. Caponet, Optimized Design of a Medium Power inverter as Power Electronic Building Block (PEBB) Compatible with the EMC Standards, January 2000.