Performance Evaluation of Static Random Access Memory (SRAM) based on Negative Capacitance FinFET

In this work, a comprehensive evaluation was performed for negative capacitance FinFET (NC-FinFET) based static random access memory (NC-SRAM) using the calibrated current-voltage relationship and dynamic behavior of NC-FinFETs that were experimentally demonstrated at 14-nm technology node. Important performance indicators of SRAM including static noise margin and standby leakage power were assessed at different values of supply voltage (V_DD). Compared with the conventional FinFET-based SRAM, it was found that NC-SRAM shows different behaviors at high V_DD and low V_DD. For example, at low V_DD, standby leakage power consumption of NC-SRAM is higher than conventional SRAM which is different from the conclusion drew by previous works when only high V_DD case was considered. Our evaluation gives new insights on the design of future NC-FinFET-based SRAMs, particularly with extremely low supply voltage.

I. Introduction

With the continuous increase of power dissipation in modern integrated chips, the need to realize devices with subthreshold swing (SS) less than 60 mV/decade becomes more and more urgent. The theoretical limit of SS with 60 mV/decade in conventional MOSFETs is set by Boltzmann distribution at room temperature. This limit could potentially be broken by a new type of devices that emerged recently by exploiting the concept of negative capacitance. This negative gate capacitance is able to amplify the surface potential at the channel of the NC-FETs relative to the applied gate voltage, making SS less than 60 mV/decade and enabling a significant reduction in power consumption. In fact, significant effort and great progress have been made in NC-FETs in the past few years, including basic theories [1 , 2] and experimental demonstrations in the device level [ 3 – 6 ]. However, there have been very limited works in evaluating the performance of NC-FET-based circuits. Tapas Dutta et al . evaluated 7-nm node NC-FinFET-based SRAM in 2017 [7] . They reported that, NC-SRAM shows advantage on standby leakage power, read delay, and static noise margin as compared to conventional SRAM. However, their work only focused on one supply voltage V _DD (0.7 V), and the performance of NC-SRAM at other V _DD values was not investigated. In addition, the effect of damping constant ( ξ _FE ), which would strongly affect the dynamic behavior of the NC-FETs and NC-SRAM, was not considered in their work. Recently, ξ _FE is widely used to model the gate delay of NC-FET caused by polarization switching of ferroelectric thin film [8] . Therefore, in order to get more comprehensive and accurate prediction to guide the design of future NC-FinFET-based circuits, evaluation of NC-SRAM at different V _DD with the consideration of the effect of ξ _FE is important.