Transformer-Based Predistortion Linearizer for High Linearity and High Modulation Efficiency in mm-Wave 5G CMOS Power Amplifiers

This paper presents a new predistortion linearization technique for high linearity and high modulation efficiency in millimeter-wave (mm-wave) CMOS power amplifiers (PA) for fifth-generation (5G) mobile communications. Our proposed linearizer adopts a transformer-based (i.e., inductive) self-compensated predistortion network at the input of the PA whose amplitude-modulation to phase-modulation (AM-PM) response is opposite compared with the AM-PM response of a CMOS PA, resulting in an AM-PM cancellation effect. This proposed inductive linearization method mitigates the large gain reduction problem in traditional capacitor-based linearization approaches while consuming no extra dc power or without introducing additional control circuitry. As a result, a significant improvement in power-efficiency and linearity is achieved with high-order complex modulation signals. To validate the proposed linearization method, a PA prototype in 65-nm CMOS technology was fabricated and tested, and it exhibited <;1° of |AM-PM| distortion at P_{0,1 dB} over 4 GHz of bandwidth (27-31 GHz). At 28 GHz, the measured saturated P₀ and peak power-added-efficiency (PAE) was 15.6 dBm and 41%, respectively, while achieving a 6-dB P₀ back-off PAE of 25%. To assess PA's large-signal performance for 5G communications, the prototype was measured with the 64-quadratic-amplitude modulation (QAM) signal at 2-Gb/s data rates at 28 and 30 GHz, and the PA achieves modulated PAE of 18.2%/17.6% and average-Po of 9.8 dBm/10 dBm, respectively, while maintaining <; -30 dBc of adjacent-channel-power-ratio and <; -25.5 dB of error-vector-magnitude. The achieved modulated-PAE at 28 and 30 GHz shows more than 2× improvement in comparison with the recently reported 28-GHz linear CMOS PAs. Also, the PA occupies a compact active-area of 0.24 mm².

I. Introduction

To MEET the unprecedented demand of high data rates in future mobile devices, the radio frequency (RF) and millimeter-wave (mm-wave) fifth-generation (5G) communication standard will heavily rely on high-order quadrature-amplitude-modulation (QAM) scheme with large peak-to-average-power-ratios (PAPRs) and channel bandwidths [1]–[8]. Highly linear and efficient integrated CMOS power amplifiers (PAs) are immensely desirable for 5G smart portable devices for improved battery life, reduced form factor, and low cost [9]–[17]. To satisfy the concurrent requirements for high-efficiency and reasonable-linearity, PAs intended for use with QAM schemes are typically operated in class-AB mode [9]–[12], [18]. Also, the gate–source capacitance () in an NMOS device is nonlinear and varies with the applied input voltage. This input capacitance modulation effect creates an input-amplitude-dependent phase shift in a class-AB mode, resulting in an amplitude-modulation to phase-modulation (AM–PM) distortion [12], [18], [19]. Consequently, the distortion degrades linearity in error-vector-magnitude (EVM) and adjacent-channel-power-ratio (ACPR), making it harder to meet the tougher specification in high-order complex modulation (i.e., 64/512-QAM) systems for 5G mobile communications.