I. Introduction
Silicon-on-insulator (SOI) is increasingly recognized as one of the most attractive platforms for photonic integrated circuits (PICs) due to the possibility of high-quality, low-cost and high-volume production in CMOS foundries, as well as the potential for low-power, high-capacity interconnects on future electronic-photonic integrated circuits (EPICs) [1], [2]. The guided mode in the SOI platform is strongly confined in the silicon waveguide owing to the high refractive index contrast, which results in a huge mismatch between the waveguide mode and a single-mode fiber mode, making it very challenging to efficiently couple light between them. A grating coupler is a promising solution to this input/output (I/O) coupling problem, which enables high-density I/O from the surface of silicon PICs and the ability to perform wafer-scale testing without the requirement of cleaving the chip [3]–[5].