A 106-Gb/s PAM-4 Silicon Optical Receiver

We present a 106-Gb/s four-level pulse-amplitude modulation (PAM-4) silicon optical receiver consisting of a low-noise fully differential transimpedance amplifier (TIA) wirebonded to a high-speed silicon photonic Ge photodiode (PD). A low-noise operation is achieved through a fully differential TIA architecture, combined with active on-chip biasing for the PD. To the best of our knowledge, this is the first integrated low-power optical receiver to report (sub-)KP4-FEC bit error ratios up to 53 GBd PAM-4 without any digital signal processing or equalization to compensate the receiver. An optical modulation amplitude sensitivity of -5 dBm at 53 GBd is obtained, while consuming 160 mW (1.51 pJ/b at 53 GBd). The receiver achieves the best-reported sensitivities from 32- up to 53-GBd PAM-4, at the lowest reported power consumption.

I. Introduction

The demand for higher data rates in datacenters has led to standardization for 400 Gb/s-Ethernet [1]. The IEEE 400GBASE-DR4 standard defines specifications for GBd PAM-4 over optical links up to 500 m standard-single-mode-fiber (SSMF). The 100G-per-lambda Multi-Source Agreement extends this GBd PAM-4 scheme up to 2km and 10km SSMF [2], hereby keeping the lane count and packaging cost low. However this introduces the need for optical transceivers with a high bandwidth and sufficient linearity for PAM-4.