I. Introduction
Silicon photonics is widely considered as the most promising photonic integration technology, with the potential to satisfy cost, volume, and integration requirements of photonic integrated circuits (PIC) for a wide range of applications, including optical communications, computing, and sensing [1]. Silicon photonics technology introduces waveguides and optoelectronic transceiver modules on a silicon chip, which makes it possible to exchange data using optical signals. It is also compatible with existing fiber based technologies and devices for optical communication. Facilitated by the compatible fabrication technology, silicon photonics combines the ultra-high precision manufacture features of CMOS with the advantages of ultra-high speed and ultra-low power consumption of integrated photonic technology [2]. The development trend of optical communication systems is to integrate active devices and passive optical waveguide devices onto a single substrate to from photonic monolithic or hybrid integration. As a result, a single-chip, muti-functional optical circuit can be achieved with high density, low cost, and low energy consumption. However, this ultimate goal is difficult to realize on silicon, due to the factor that silicon is an inefficient light emitter. Approaches using wafer bonding or flip-chip based hybrid integration of Fabry-Perot and distributed feedback lasers on silicon substrate have been demonstrated, exhibiting comparable performances to their counterparts on the InP substrate [3], [4]. As compared to the edge emitting lasers, vertical-cavity surface-emitting laser (VCSEL) employs a compact laser cavity, and its driving current is typically less than 10mA. These features facilitate low cost and low power consumption, which is more attractive for large scale integration. However, the vertical emitting nature of a VCSEL makes it difficult to couple with planar photonic circuits. Although integration of long wavelength VCSELs on silicon circuits have been achieved using grating couplers [5]–[8], the coupled power is still low due to the poor performance of the grating coupler or the complexity of the integration technology.