Hybrid Systems-in-Foil - Combining Thin Chips with Large-Area Electronics

This paper reports on the status of a comprehensive ten-year research and development effort towards Hybrid System-in-Foil (HySiF). In HySiF, the merits of high-performance integrated circuits on ultra-thin chips and of large-area and discrete electronic component implementation are combined in a complementary fashion attached on or laminated in a flexible carrier substrate. HySiF paves the way to entirely new applications of electronic products where form factor, form adaptivity or form flexibility are key enablers. In this review paper the various aspects of thin-chip fabrication and embedding, device and circuit design under impact of unknown or variable mechanical stress, and the on- and off-chip implementation of sensor, actuator, microwave and energy supply components are discussed.

I. Introduction

Printed circuit board (PCB) and integrated circuit (IC) are well established technologies for achieving both utmost integration density and performance in nanoelectronics and, at the same time, electronic interfacing to the macroscopic user environment. During the past ten years several approaches have come up for merging those technologies, either by shifting PCB related aspects to the IC package, i.e. system-in-package (SiP) [1] , or by shifting packaging related concepts and metal passive elements to the PCB or chip periphery (bare die in or on PCB [2] , chip-in-mold eWLB technology [3] ). All those efforts are directed towards watering down the interconnect and performance bottleneck at the chip edges where sub-micrometer interconnects on chip meet 10–100 micrometer dimensions on PCB. Also, due to that fact, a substantial part of the chip area is devoted to bond pads, thus increasing the total chip area and cost, which is particularly of concern for small chips.