I. Introduction
The non-intrusive board test (NBT) methodology integrates several, software-driven, test technologies to restore test coverage lost due to diminished printed circuit board (PCB) physical access and reduce cost where intrusive methods are still used[1]. The non-intrusive test technologies that make up NBT include, but are not exclusively limited to, boundary-scan test (BST), per IEEE Std. 1149.1 and its progeny, processor-based functional test (PFT), employing processor-based target agents to test on-board memories and high speed end-point components, and FPGA-controlled test (FCT), deploying FPGA-based embedded instruments for component functional and performance test. In fact, these technologies form a perfect complement. They are all non-intrusive, typically requiring access only to the common board level debug/test access port; but each test technology brings its own distinct elements of defect coverage to the NBT strategy. These complementary test technologies provide PCB defect coverage in three critical areas: structural test, functional test, and performance measurement.