High-Throughput Architecture for Both Lossless and Near-lossless Compression Modes of LOCO-I Algorithm

Real-time image lossless and near-lossless compression based on LOCO-I algorithm is in great demand in many critical missions, such as satellite remote sensing, space exploration, and nuclear medical imaging, for its excellent complexity/compression rate tradeoff. However, the real-time implementation of LOCO-I encounters two bottlenecks in error prediction: the context conflict in context update and the pixel reconstruction loop in near-lossless mode, which always limit the overall throughput in practice. This paper adopts a patch-wise compression method and proposes a high-performance globally pipelined hardware architecture with spatial parallelism in local, in which patch-wise dual parallel error prediction (PEP) modules are designed. The PEP gains an extra pixel cycle and thus, alleviates both the two bottlenecks. Besides, an equivalent simplification scheme is designed to accelerate the error quantization computation, the most time and resource consuming procedure in the pixel reconstruction loop, saving the resource usage, and reducing computing delay. The proposed encoder is able to compress each image patch independently in either lossless or near-lossless mode by parameter setting. It facilitates the Region of Interests compression so as to improve the overall compression ratio and achieves excellent information fidelity. Moreover, the possible error propagation can be prevented and constrained within one single patch. The proposed architecture is implemented on a XILINX Virtex6-75t FPGA and achieves a maximum throughput up to 51.684 MPixel/s. It is the fastest architecture reported in the literature which implements both lossless and near-lossless compression modes.

I. Introduction

Real-time image lossless and near-lossless compression is of great demands for high information fidelity in some critical missions, such as satellite remote sensing, space exploration and nuclear medical imaging. Among various existing lossless and near-lossless compression algorithms, as an ITU/ISO standard for continuous-tone images compression, JPEG-LS is an appealing choice due to its coding scheme LOCO-I, which achieves the best complexity and compression rate tradeoff [1]–[4]. In the past decades, the hardware implementations based on the application specific integrated circuits (ASICs) and field-programmable gate-array (FPGA) for LOCO-I algorithm have attracted wide studies [5]–[13].