Introduction
Recently, phase change random access memory (PCRAM) has become the most promising candidate to replace flash memory. For a selector, which is part of PCRAM cell, an ovonic threshold switch (OTS) is used, as it has many benefits for increasing the area efficiency and the ratio. However, as shown in Fig. 1, when a PCRAM cell is selected for a read or write operation, a sharp current spike occurs from each selected cells, due to the unique I-V characteristic of OTS [1]. Therefore, the load current of the negative power supply in PCRAM system, where the current of every selected cells are combined, contains a severely sharp current spike that can be around peak of 100 mA with a short rising time of a few ns. Accordingly, a large voltage spike occurs abruptly on the negative power line with a long settling time . Therefore, an ultra-fast capacitor-less low-dropout regulator (LDO) is necessary for a PCRAM system to guarantee its stable operation, which output voltage satisfies and ns.