PCB Edge Shielding Effectiveness Evaluation and Design Guidelines

Edge plating and via stitching connecting ground planes are two common edge treatments to suppress electromagnetic interference (EMI) from multilayer printed circuit boards (PCB). One critical parameter for stitching via is the spacing between vias. At higher frequencies, it is desirable to plate the edges of PCB, and a gap is required in the plating to accommodate the break-off tabs. In this paper, the shielding performance of these two scenarios are studied in both simulation and measurement. By sweeping the parameters of via pitch size and the length of each plated edge, the near-field shielding effectiveness (SE) of these different cases are compared. In general, the edge plating cases have much better shielding performance than the stitching via ones. Since edge plating implements the shielding on PCB walls, it leaves no interference with signals and moreover saves space for dropping GND stitching vias, with a trade-off of 5% more cost. Design guidelines for PCB edge treatments are provided in the end of the paper.

I. Introduction

For modern electronic products, with correct PCB layout, differential signaling and common mode filtering on cables, it is sometimes possible to meet commercial EMI requirements without employing any shielding. However, with the galloping development of consumer electronic devices, higher and higher data rate is achieved. Though this can significantly enhance the user experience, it potentially leads to more electromagnetic interference (EMI) [1]–[9] and radio-frequency interference (RFI) [10]–[12] issues. This is due to high-speed signals traveling through vias excites the cavity modes, which propagates to PCB edges and causes radiation. Without proper remedies to reduce the radiation, it may result in malfunctions of modules and failure in the compliance test.