Fibonacci Series Based Transition Reduction Dynamic Sector CODEC Design

The process of data word transmission on an on-chip bus leads to switching activity of data bits on the bus wires, which charges and discharges the capacitance associated with the wires and consequently leads to dynamic power dissipation and delay increases. The amount of power dissipation at buses is significant compared to remaining circuit power dissipation. It is desirable to encode the values sent over these buses to decrease the switching activity and thereby reducing the bus power consumption and reducing the delay. In this paper, we present the input as Fibonacci sequence and partition the source word space into a number of sectors with a unique identifier. The combination of Fibonacci series and dynamic sector encoding technique (FS-DS) to reduce the number of transitions as well as to reduce the power dissipation and delay.

I. Introduction

In Very Large Scale Integration (VLSI), the size of the transistor has been consistently decreasing. The technology of semiconductor with transistor sizes is of more than a few tens of nanometers are currently under development. The functionality of the buses has to distribute data, clock signals to various circuits on the chip. The measures about the performance of the integrated circuits also depend on the consumption of power and delay of the interconnections (buses). In DSM (Deep sub-micron) the capacitance effect plays an important role [1] for deciding the characterization of the on-chip buses due to that capacitance crosstalk as shown in fig 1. and the delay in signal propagation which reduces performance, the reliability in data transmission and the problem in consumption of power will arise. These effects occur in embedded processors, digital signal processors(DSP), Microprocessors. Consider any processor the data transmission occurs through an address bus and data bus. The address buses carry more correlated data fewer number data of changes so it consumes less power (except JUMP, BRANCH ) and data busses carry less correlated data there is more number of data (due to random nature)changes occur so it consumes more power.