Impact of PWM Schemes on the Common-Mode Voltage of Interleaved Three-Phase Two-Level Voltage Source Converters

Interleaved three-phase voltage source converters (VSCs) are widely applied in industry. The circulating current issue has been the focus so far in literature. However, the common-mode voltage (CMV) generated from interleaved VSCs, which is also a key factor that influences the system's performance, has not yet been studied in detail. In this paper, the impact of pulsewidth modulation (PWM) strategies on the CMV of interleaved two-level VSCs is analyzed. The analysis is conducted based on the double Fourier integral theory and in a generalized way considering an arbitrary number of interleaved converters. Five PWM schemes are considered, including the interleaved sinusoidal PWM (ISPWM), the interleaved space vector modulation (ISVM), the interleaved discontinuous PWM (IDPWM), and the recently proposed interleaved carrier phase-shift PWM (ICPS PWM), and interleaved carrier phase-shift SVM (ICPS SVM). Both magnitude and harmonic content of CMV are examined for each method. The analysis reveals that with ISPWM, ISVM, ICPS PWM, and ICPS SVM, the CMV can be reduced. In contrast, interleaving has little impact on the CMV with IDPWM, which is always at VDC/2 due to high low-order harmonics, making it less attractive for drive applications using coupled architecture. For modular architecture, ICPS PWM and ICPS SVM are more desirable considering their low-ZSCC peak value. The study is verified through experimental results.

I. Introduction

Three-Phase two-level voltage source converters (VSCs) have been dominating in dc–ac and ac–dc power conversion applications. For high-current applications, paralleling several VSCs is a common practice in industry [1]–[4]. In addition, reliability can be enhanced. By further interleaving the paralleled converters, multilevel output can be obtained, and therefore substantial reductions in the dc-link capacitance and line filter size reduction become possible [5]–[7]. Nevertheless, excessive circulating current could be generated in this case, which can be classified as DMCC and ZSCC. The circulating current can cause unbalanced current sharing and induce excessive losses. To constrain circulating current to an acceptable range, passive approaches are indispensable. The two most popular passive approaches are CI and the combination of DMI and CMI. Two system architectures can be realized, namely coupled architecture [5], [6], [8]–[11] and modular architecture [7], [12] –[15], as shown in Fig. 1. Based on the application requirements, either architecture can be selected. Fig. 1.

Two architectures of interleaved converters. (a) Coupled architecture. (b) Modular architecture.