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720-V/0.35-m-cm2 Fully Vertical GaN-on-Si Power Diodes by Selective Removal of Si Substrates and Buffer Layers | IEEE Journals & Magazine | IEEE Xplore

720-V/0.35-m \Omega \cdot cm2 Fully Vertical GaN-on-Si Power Diodes by Selective Removal of Si Substrates and Buffer Layers


Abstract:

This letter demonstrates a novel technology to fabricate fully vertical GaN-on-Si power diodes with state-of-the-art performance. Si substrate and buffer layers were sele...Show More

Abstract:

This letter demonstrates a novel technology to fabricate fully vertical GaN-on-Si power diodes with state-of-the-art performance. Si substrate and buffer layers were selectively removed and the bottom cathode was formed in the backside trenches extending to an n+-GaN layer. A specific differential ON-resistance of 0.35-0.4 mΩ·cm2 (normalized to the total device area) and a breakdown voltage of 720 V were demonstrated in this novel fully-vertical GaN-on-Si p-n diode, rendering a Baliga's figure of merit over 1.5 GW/cm2. These results set a new record performance in all vertical GaN power diodes on foreign substrates, and demonstrate the feasibility of making fully vertical GaN-on-Si power diodes and transistors by selective removal of Si substrates and buffer layers.
Published in: IEEE Electron Device Letters ( Volume: 39, Issue: 5, May 2018)
Page(s): 715 - 718
Date of Publication: 26 March 2018

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I. Introduction

GaN-based electronic devices are excellent candidates for power applications due to the superior physical properties of GaN compared to Si, SiC and GaAs. Recently, GaN vertical devices have attracted increased attention, due to their advantages over GaN lateral devices for high-power switching: (a) higher breakdown voltage (BV) and current capability for a given chip size, (b) superior reliability gained by moving the peak electric field away from the surface into bulk devices, and (c) easier thermal management [1]. Vertical GaN transistors [2]–[6] and diodes [7]–[9] with excellent performance have been recently demonstrated on GaN substrates. However, the high cost and small diameter of GaN substrates is an important obstacle for the commercialization of GaN-on-GaN vertical power devices. GaN vertical devices on low-cost Si substrates are therefore highly desired, as they could allow for at least 50-to-100-fold lower wafer and epitaxy cost as well as the possibility of processing on 8-inch Si substrates [10]. However, the insulating buffer layers, which are typically needed to handle the lattice mismatch and thermal stress in GaN-on-Si wafers, make it challenging to realize the vertical current conduction in GaN-on-Si vertical power devices.

References

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