Introduction
The arrayed waveguide gratings (AWGs) are one of the key enabling technologies of dense-wavelength-division-multiplexing (DWDM) applications such as telecommunications, datacom, optical sensing, and optical spectroscopy [1]–[3] . These applications impose different requirements on AWGs implementations, which influence choices on material platform. For instance, silica [4], silicon [5], InP [6], Polymer [7], germanium [8], and silicon nitride (Si3N4) [9] are common material platforms for AWG realizations. It is well-known [4] that, for a given accuracy and resolution of AWG fabrication and design, the optical crosstalk and loss values improve with lower optical index contrast they have between the waveguide core and cladding of the AWGs, and the price of larger footprints they occupy. Therefore, silica AWGs typically have lower losses and lower crosstalk values compared to silicon photonic AWGs, even with higher resolution fabrication processes applied to silicon photonic fabrication. However, the footprints values of silica AWGs are far larger than those of silicon photonic AWGs [10]. On the other hand, Si3N4 /SiO2 based optical waveguides offer a good compromise in the nearly optimal design space exploiting relatively high and adjustable effective index contrast [11], which facilitate future integration with silicon photonics [12] and the III-V materials [13] across a wide spectral range [14], [15].
By employing a relatively thin Si3N4 core, the Si3N4/SiO2 AWG can achieve the effective index contrast, the bending radius, and the optical loss values similar to those of the silica counterparts [9]. In this paper, we designed and demonstrated AWGs utilizing a 200-nm-thick-Si3N4-core platform with a moderate confinement factor (33%) to realize relatively low-loss, low-crosstalk and small footprints. As Fig. 1(a) illustrates, the corresponding minimum bending radius simulated for a 2-μm-wide single mode waveguide is 50 μm, which is 30× smaller than 1.5 mm achieved for a 50-nm-thick-Si3N4-core platform.
The simulation of (a) the bending loss for 200-nm-thick-core (red) and 50-nm-thick-core (black) Si3 N4 platform; (b), (c) the intensity distribution of the fundamental TE mode in the 0.2 × 2 μm2 and 0.2 × 3 μm2 Si3N4 /SiO2 waveguides.
Design
Based on this platform, we designed 8 × 200 GHz, 16 × 100 GHz, 16 × 50 GHz, and 16 × 5 GHz Si3N4 AWGs, consisting of two star-couplers and an array of waveguides with a linear increment of the optical path lengths. As Fig. 1(b) shows, we use 2-μm-wide waveguides as single mode inputs and outputs. The junctions between the free propagation region and waveguides are 4-μm-wide apertures. Fig. 1(c) shows the mode profile of 3-μm-wide multi-mode waveguides as the straight sections of the arrayed arms, which is less sensitive to waveguide sidewall corrugations. The bending sections of the arrayed arms remain 2-μm-wide with the radius value of 150 μm. In between the sections with different waveguide width, we use 100 μm long adiabatic tapers as the transition. There are 22 waveguides as the arrayed arms for the 8 × 200 GHz AWG, and 34 waveguides for the 16 × 100 GHz, 16 × 50 GHz, and 16 × 25 GHz Si3N4 AWGs with free spectral range (FSR) of 1.8 THz, 0.9 THz, and 0.45 THz. The corresponding AWGs footprints are 1.8 × 0.6 mm2, 2.2 × 0.7 mm2, 3.7 × 0.7 mm2, and 6.8 × 0.7 mm2, respectively. The layout tool we used for the AWGs is IPKISSTM. We used Lumerical MODE solutionsTM for the waveguide simulations.
Device Fabrication
Device fabrication utilizes the ASMLTM PAS 5500 300 deep-UV lithography stepper with a 248 nm laser source. The minimum feature size was 250 nm. The fabrication process started with bottom cladding deposition of 3-μm-thick low-temperature oxide (LTO) on 6-inch silicon wafers. The subsequently deposited 200 nm stoichiometric Si3N4 layer serves as the waveguide core utilizing low-pressure chemical vapor deposition (LPCVD) at 800°C. We patterned the devices with photoresist and bottom anti-reflection coating (BARC) to improve lithography resolution. Using these patterns, the Inductively Coupled Plasma (ICP) system fully etched the unmasked areas of the Si3N4 core along with BARC using C4F8 and H2 gasses mixtures. The final step included the deposition of another 3 μm thick LTO as the overcladding and dicing. We polished the facets of the chips to reduce fiber-to-waveguide coupling loss. Fig. 2 shows the fabricated 8 × 200 GHz Si3 N4 AWGs.
Testing Results
Phase and amplitude characterization of AWGs involved an optical vector network analyzer (OVNA) system with single mode lensed fibers as input and output coupling to the 2-μm-wide facet-polished Si3N4 waveguides. The fiber-to-fiber insertion loss of the reference straight waveguides on the AWG chip was 3.5 dB with TE input, which included 1.5 dB coupling loss per facet and 0.5 dB/cm propagation loss. Fig. 3(a)–(d) illustrate the transmission spectrum of the 8 × 200 GHz, 16 × 100 GHz, 16 × 50 GHz, and 16 × 25 GHz Si3N4 AWGs normalized to the reference straight waveguide. The insertion loss values of the AWGs were 1.5 dB, 1.7 dB, 1.8 dB, and 2.7 dB; the corresponding crosstalk values were −24 dB, −21 dB, −20 dB, and −13 dB, respectively. The delay length of an AWG is inversely proportional to the channel spacing. Therefore the AWGs with smallest channel spacing of 25 GHz have larger footprints compared to the 200-GHz-AWGs. However, the long delay length induces more propagation losses and accumulates phase errors. As Table 1 shows, the insertion loss and crosstalk increases while the channel spacing decreases. As Fig. 3 illustrates, the measured channel spacing accurately matches the design values of the Si3N4 AWGs. The center wavelength values are different because the fabricated waveguides have slightly different dimensions than the simulated devices. The fluctuation around the peaks on the transmission spectrum is due to the Fabry-Perot effect between the two polished chip facets. The AWGs with 16 channels employ a relatively smaller port-to-port gap in the star coupler, resulting in a larger overlapping on the spectrum between the adjacent channels. As the channel density increases, the crosstalk between the adjacent channels becomes larger with a constant channel bandwidth. For the current or future DWDM systems, the desired AWGs have ultra-low crosstalk values with a high channel density and a reasonably wide channel width. One approach to achieve the desired performance is to employ the flat-top AWG design by cascading additional spectral filters [16].
The measured Si3N4 AWG spectral response of (a) 8 × 200 GHz; (b) 16 × 100 GHz; (c) 16 × 50 GHz; (d) 16 × 25 GHz.
Fig. 4(a) and (b) show the
amplitude and the phase error values over the arrayed waveguide arms of the 16 × 50 GHz and
16 × 25 GHz Si3N4 AWGs at the 15th output channel measured by using the
OVNA system. The power distributions in the arrayed arms indicate the Gaussian far-field projection of the waveguide
aperture in the input star-coupler. As Fig. 4(a) indicates, the phase
errors appear to be greater for the longer array waveguides. In the 16 × 25 GHz Si3N
4 AWG, the 11th and 12th arrayed arms showed high loss probably due to the damaged waveguides during
fabrication. The measured RMS phase errors of the 16 × 25 GHz and
16 × 50 GHz Si3N4 AWG were
The measured amplitude (blue) and phase error (red) over the arrayed waveguides of (a) 16 × 50 GHz; (b) 16 × 25 GHz Si3N4 AWG.
Conclusion
We report on low-loss (1.5 to 2.7 dB) and low-crosstalk (−24 to −13 dB) AWGs with various channel spacing and relatively small footprints on a 200-nm-thick-Si3N4–core platform. The measured channel spacing matched well with the design parameters. The RMS phase errors of the arrayed waveguides were π/6 and π/40 for the 16 × 25 GHz and 16 × 50 GHz AWGs. The devices footprints were 1.8 × 0.6 mm2, 2.2 × 0.7 mm2, 3.7 × 0.7 mm2, and 6.8 × 0.7 mm2 for the 16 × 100 GHz, 16 × 50 GHz, and 16 × 25 GHzAWGs, respectively.
ACKNOWLEDGMENT
Fabrication of the devices utilized the facilities at the Marvell Nanofabrication Laboratory (Berkeley, CA) and at the Center for Nano-MicroManufacturing (Davis, CA).