Influence of Viscoelastic Underfill on Thermal Mechanical Reliability of a 3-D-TSV Stack by Simulation | IEEE Journals & Magazine | IEEE Xplore

Influence of Viscoelastic Underfill on Thermal Mechanical Reliability of a 3-D-TSV Stack by Simulation


Abstract:

In this paper, we focus on how viscoelastic underfill influences the thermal mechanical reliability of a 3-D through-silicon-via (3-D-TSV) stack. The Williams-Landel-Ferr...Show More

Abstract:

In this paper, we focus on how viscoelastic underfill influences the thermal mechanical reliability of a 3-D through-silicon-via (3-D-TSV) stack. The Williams-Landel-Ferry equation and relaxation of the modulus in the Prony series are used to describe the viscoelastic properties of underfill in detail. The 3-D-TSV stack consists of a four-layer die stack, a silicon interposer, a printed circuit board, TSVs, microbumps, and solder balls. Simulation results show that, with underfill applied, chip warpage is worse and the residual stress of the microbumps is increased. Therefore, a design suggestion is proposed where underfill with a lower coefficient of thermal expansion is preferred in 3-D-TSV stacks for applications undergoing heavy thermal cycles. In terms of simulation accuracy, the simulation is compared with the simplified treatment where underfill is considered completely elastic. We conclude that defining the viscoelasticity properties is more relevant for underfill than elasticity.
Published in: IEEE Transactions on Device and Materials Reliability ( Volume: 17, Issue: 2, June 2017)
Page(s): 340 - 348
Date of Publication: 16 March 2017

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I. Introduction

Underfill is widely adopted in flip chip on board (FCOB) packages to redistribute stress around solder joints and reduce the stress concentration induced by a mismatch in the coefficient of thermal expansion (CTE) between silicon chips and organic substrates. The dependence of thermal mechanical responses of FCOBs on the viscoelastic properties of underfill and how it differs from a simplified treatment, where underfill is considered completely elastic in simulation, have been investigated in detail earlier [1]–[5]. When compared with the linear elastic model, slightly more warpage of chips and approximately doubled accumulated creep strain in the solder joints are evaluated through linear viscoelastic modeling of the underfill [6]. It is also reported that a cure-dependent viscoelastic model of underfill is applied to add a curing-induced initial stress state into simulations in order to match the experimental results better [7].

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