Contents I. Introduction
The scaling of semiconductor device has been the driving force for the technology advancements in the industries over the last few decades. Scaling indicates the reduction of the lateral geometric dimensions of MOSFET devices. Scaling improves cost, speed and power per function with every newer technology generation [1]. So, Size reduction has become the vital point of research for modern electronic device upgradation. However, to comply with the scaling trends some significant issues have come forward like short channel effect, off-state current or the leakage current of the MOSFETs. Leakage current optimization is the challenging task for the small scale electronic device fabrication, because power consumption, device lifetime and performance is related to this unwanted leakage current. To keep pace with Moore's law while device size minimization, reduction of gate length increases drive current that also necessitates a decrease of the gate oxide thickness to maintain electrostatic control of the charges induced in the channel. Therefore, while lateral dimension of the MOS device is being scaled, vertical dimensions e.g. oxide thickness, gate width must be reduced in order to keep pace with the reduction of gate length. So the oxide layer thickness, gate width, gate length's has individual effects on gate leakage current. Except the defects in material during fabrication, gate leakage current can be optimized by using different dielectric and proper scaling of device dimension. Due to the limitation of fabrication, all kinds of dielectric materials can't be used in MOS devices. SiO2 is the most widely used dielectric material but it is not possible to abate leakage current significantly with this. As the leakage current heated up the device, it has negative impact on device performance because semiconductor device is very sensitive to temperature change. So the researchers and device engineers are persistently working on reducing the leakage current to improve the device performance. However the previous research to analyze gate leakage current was only confined on a single model. For better realization of gate leakage current, sufficient understanding of the theoretical performance with distinct dielectric materials is of immense importance [2]. In this article, a comparative analytical approach is introduced with different dielectric materials considering device dimension to reduce leakage current. Here a significant reduction of leakage current has been noticed with rather than and . Also it is observed that there is a reduction of leakage current with comparatively small gate length as well as gate width. But the things are found reverse for small oxide thickness.
