I. Introduction
IN CMOS technology applications the high sub-threshold and gate dielectric leakage currents constitute major impediments in the sub-micron threshold region. FinFET devices are stated to be the double gate devices and they are supposed to be the very good substitutes for bulk CMOS devices. The Double Gate FinFET (DG-FinFET) has an added advantage in suppressing sub threshold and gate dielectric leakage currents compound to single gate MOSFET. It has lower gate leakage, stronger gate control and ability of reducing short channel effects. Due to these superior characteristics FinFET device shows advantages in terms of speed, sizing of transistors and performance in sub-micron/threshold regions. Top view of the double gate FinFET structure [1] and its symbol are shown in Fig. 1. At low +V dd value the FinFET provide higher drive currents and lower flicker noise levels, it is suitable for analog and digital applications [2]–[3].