An efficient implementation of generalized extreme studentized deviate (GESD) on field programmable gate array (FPGA)

Outliers are one of the data problem which cannot be overlooked. The problem arise from the possibility of the outliers to become a bad data which can lead to error. One of the technique for identifying as well as eliminating outliers is generalized extreme student deviate (GESD). In this research the implementation of GESD on FPGA is examined. There are two complicated operations on GESD, i.e. division and square root which would be evaluated to find the most efficient processor design. The combination of Binomial and CORDIC has the most efficient resource utilizations with 48%. Meanwhile, the combination of Binomial and Non Restoring is the runner up with 56%.

I. Introduction

Field Programmable Gate Array (FPGA) is a development board consist of integrated circuit which run logic function on hardware. On its implementation, Hardware Definition Language (HDL) is used. There are various type of HDL, but Verilog and Very High Speed Integrated Circuit (VHSIC) HDL (VHDL) is widely used in FPGA programming [1].