A 60-GHz Power Amplifier With AM–PM Distortion Cancellation in 40-nm CMOS

This paper presents a complementary push-pull 60-GHz power amplifier (PA) in 40-nm CMOS. The proposed technique is used to mitigate the amplitude to phase modulation (AM-PM) distortion caused by the nonlinear input capacitance of an MOS transistor. By operating in deep class-AB mode, the back-off efficiency of the PA is improved without compromising gain. The proposed interstage transformer with two secondary windings enables right impedance transformation concurrently for the two separate transistors with independent biasing ability. The two-stage PA achieves a gain of 22.4 dB, power added efficiency (PAE) PAEMAX of 23%, and saturated output power (P_SAT) of 16.4 dBm with 8% PAE at 6 dB back-off. With <;0.8° AM-PM distortion, the linearity is demonstrated by amplifying a 250-MHz 3-Gb/s 64-QAM signal with 7 dBm of average output power and achieve an error vector magnitude (EVM) of -25.2 dB and >35 dB of adjacent channel power ratio. Also a comparison with a common-source PA is presented, which shows its limitation in dealing with AM-PM distortion.

I. Introduction

The next big leap in the technology roadmap for next-generation wireless cellular communication will be 5G. Even though 5G is still a developing idea, there is a clear direction where the next-generation wireless network would be in terms of performance. 5G networks will offer at least capacity of present system bringing peak data rates to the device between 1 and 10 Gbps [1].