I. Introduction
In Order to continue scaling integrated circuits to deep sub-micrometer dimensions, device manufacturers have replaced polysilicon gates with metal gate stacks and typically use metal clad or metal silicide source/drain regions. The metals used in modern processes tend to be considerably heavier than silicon, leading to a high-Z/low-Z interface in many modern devices. The secondary electron environment near a high-Z/low-Z interface has been shown to be significantly perturbed from equilibrium under x-ray and gamma-ray irradiation [1], [2]. However, the secondary electron environment at a high-Z/low-Z interface under ion irradiation has not previously been reported.