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Ultra Large-Grain Poly-Si Thin-Film Transistor Using NiSi2 Seeding Si-Amplified Layer | IEEE Journals & Magazine | IEEE Xplore

Ultra Large-Grain Poly-Si Thin-Film Transistor Using NiSi2 Seeding Si-Amplified Layer


Abstract:

A novel technique for enlarging grains of poly-Si thin-film has been successfully demonstrated, using a 1-μm thick Si-amplified layer (SAL) and NiSi2 seeds on the top. It...Show More

Abstract:

A novel technique for enlarging grains of poly-Si thin-film has been successfully demonstrated, using a 1-μm thick Si-amplified layer (SAL) and NiSi2 seeds on the top. It was applied to top-gated thin-film transistors (TFTs) and showed high electrical performance. The NiSi2 seeds induce vertical crystallization in the SAL and migrate toward the bottom, forming columnar grains. The grain size of the poly-Si thin-film increases when the NiSi2 seeds diffuse deeply into the SAL and eventually an ultralarge-grain (ULG) poly-Si thin film is formed. The SAL was removed for use in the fabrication of a top-gated TFT. The performance of the ULG poly-Si TFT was compared with that of a NiSi2 seed-induced crystallized poly-Si TFT which was fabricated without an SAL.
Published in: IEEE Electron Device Letters ( Volume: 36, Issue: 8, August 2015)
Page(s): 778 - 780
Date of Publication: 01 June 2015

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I. Introduction

Rcently, polycrystalline-Si (poly-Si) thin-film transistors (TFTs) are of great interest due to their application in flat-panel displays (FPDs) and static random access memories (SRAMs) [1]. Although the poly-Si TFT shows high mobility and high current density compared to the amorphous-Si (a-Si) TFT, its grain boundaries are mainly responsible for the limitations in its performance, such as high threshold voltage, poor sub-threshold slope and poor reliability. In all these areas it is inferior to the crystalline-Si (c-Si) TFT [2], [3].

References

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