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Enhanced Phasor Estimation Technique for Fault Location in Series-Compensated Lines | IEEE Journals & Magazine | IEEE Xplore

Enhanced Phasor Estimation Technique for Fault Location in Series-Compensated Lines


Abstract:

Accurate phasor-based fault location in series capacitor-compensated transmission lines is a challenging task due to the presence of subsynchronous frequency components i...Show More

Abstract:

Accurate phasor-based fault location in series capacitor-compensated transmission lines is a challenging task due to the presence of subsynchronous frequency components in the measured voltage and current signals. In this letter, an enhanced technique is proposed based on Prony analysis and discrete Fourier transform to accurately estimate voltage and current phasors for the purpose of offline fault location. A comprehensive simulation and fault-location analysis is performed using PSCAD and Matlab to establish the successful application of the proposed technique to the fault location.
Published in: IEEE Transactions on Power Delivery ( Volume: 30, Issue: 4, August 2015)
Page(s): 2058 - 2060
Date of Publication: 26 January 2015

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I. Introduction

The presence of series capacitor and metal–oxide varistor (MOV) as part of the series capacitor protection unit (SCPU) in the fault loop introduces a considerable amount of subsynchronous frequency components (SSFCs) along with decaying dc components (DDCs) in the measured signals at the incidence of a fault in series capacitor-compensated transmission lines (SCCTLs). Signals infested with a high degree of SSFCs and DDCs lead to erroneous phasor estimation which further affects the fault location adversely in SCCTLs [1].

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