A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters

Increasing the energy efficiency of today's high-performance computing systems requires new approaches that go beyond homogeneous architectures, which primarily target maximum performance per node. Heterogeneous architectures that can be tailored towards the specific needs of a particular application are a promising alternative to state-of-the-art server systems. In this paper, we present a novel highly-scalable server architecture that seamlessly integrates variable combinations of general purpose CPUs, embedded CPUs, FPGAs, and GPUs. Embedded CPUs based on the latest ARM Cortex-A15 devices with integrated embedded GPUs are combined with FPGA-based reconfigurable SoCs, which can be used for application-specific hardware acceleration. A dedicated monitoring network enables continuous control and fine-grained observation of all relevant system parameters. Communication between the compute nodes is established by a flexible multi-level interconnect that can be adapted to various Ethernet and Infiniband standards. The communication facilities are further enhanced by direct high-bandwidth, low-latency links between the embedded FPGA-based reconfigurable SoCs.

I. Introduction

A main challenge on the way to Exascale computing is a significant improvement in power efficiency. Furthermore, as cluster computing and HPCs are gaining more ground in different new applications, energy efficiency in supercomputers is drawing more and more attention. This can also be understood from the emergence of the Green500 list in addition to the Top500 list. As a result, alternative or heterogeneous architectures are becoming more and more popular because of their high potential regarding power efficiency. Furthermore, it is possible to have heterogeneous architectures that are optimized for a specific application. This optimization can be done in terms of computation time and energy consumption. But deploying and optimizing applications for a certain architecture is a challenging task, typically leading to a very specialized solution. Therefore, a flexible test-bed infrastructure that can be configured with different possible hardware options like CPUs, GPUs and FPGAs alongside with a proper interconnection infrastructure can ease the selection of the best platform for a specific application.