Particle Swarm Optimization guided multi-frequency power-aware System-on-Chip test scheduling using window-based peak power model

This paper presents a multi-frequency test scheduling strategy for System-on-chip (SoC) under power constraint. While existing approaches consider either global peak or cycle-accurate power model, the proposed work considers an intermediate approach to reduce the power overestimation of global peak power model as well as the computational complexity of cycle-accurate power model. A Particle Swarm Optimization (PSO) guided test scheduling strategy has been integrated with our new window-based peak power model to reduce Test Application Time (TAT) over global peak power model. Experimental results show that further improvement in TAT can be achieved using multi-frequency test environment over single-frequency test approach.

I. Introduction

Testing of different embedded cores with a common tester (ATE) has become a major challenge for System on Chip (SoC) test designers. Most of the System-on-Chip test scheduling problems [1]–[6] assume that the cores and the tester operate at a single frequency. However, in recent times multi-frequency operation of embedded cores has drawn the interest of many researchers. Test scheduling under multi-frequency environment has emerged to be a potential research problem.