I. Introduction
Circuit simulation remains a vital tool for the design of integrated circuits. As transistors decrease in size with each generation of CMOS technology, their variability is increasing, so there is a need to characterize digital systems at the circuit level. Conventional algorithms, such as those used in SPICE, have many features that are inherently sequential and that have proved very difficult to parallelize. With the speed of conventional processors limited to less than 4GHz, it is essential that parallel algorithms are found.