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ARINC 653 and multi-core microprocessors — Considerations and potential impacts | IEEE Conference Publication | IEEE Xplore

ARINC 653 and multi-core microprocessors — Considerations and potential impacts


Abstract:

We live in a world where computer-based electronics are utilized by consumers as part of their every day routines. The enormous size of this worldwide consumer electronic...Show More

Abstract:

We live in a world where computer-based electronics are utilized by consumers as part of their every day routines. The enormous size of this worldwide consumer electronic market ends up influencing the types and capabilities of microprocessors available for other lower-volume electronic markets, including commercial avionics. Customer demands for additional product features and improved response times are driving the development of microprocessor improvements that satisfy these demands. In response, some processor designers have integrated multiple processor cores into a single hardware component that permit multiple software applications and threads to execute concurrently. Commercial avionics products today are predominantly single-core. Whether consumer product demands for multi-core processors will significantly impact the availability of single-core processors is still yet to be seen. There is a discernible trend for new processor designs, including many “leading-edge”, to be multi-core. Certification considerations in the use of multi-core processors in commercial avionics are currently being studied and researched by a range of aircraft manufacturers, avionics suppliers, software suppliers, hardware vendors, and research organizations. This paper covers one such multi-core related software topic: Given an operating system running on a multi-core processor that satisfies an avionics product's certification considerations, what are the cascade affects on applications that utilize a software architecture and set of programming interfaces as defined in ARINC specification 653 [1], “Avionics Application Software Standard Interface”? This paper describes the considerations and potential impacts of utilizing multi-core processors in an ARINC 653 based software environment.
Date of Conference: 14-18 October 2012
Date Added to IEEE Xplore: 20 December 2012
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Conference Location: Williamsburg, VA, USA

Introduction

This paper discusses multi-core processor considerations against the capabilities defined in the industry standard [1] “Avionics Application Software Standard Interface”, generally referred to as ARINC 653. This standard is managed by the ARINC organization through use of a collaborative committee structure that includes participants from commercial airline companies, aircraft manufacturers, avionics equipment manufacturers, and software suppliers. First published in 1997, the intent of the ARINC 653 standard is to specify a set of standard programming interfaces (services) between an operating system and the application software. In addition, it defines a platform environment, based on robust partitioning, for a set of applications developed to the standard to concurrently execute. By standardizing the programming interfaces and the environment, application software developed on one avionics computer resource could be reused on another avionics computer resource with a high degree of portability. Once an ARINC 653 based environment has satisfied appropriate certification activities, applications of different software levels are intended, based on the environment's robust partitioning support, to concurrently execute. In 2006, the standard was extended, requiring the creation of multiple parts to represent different capabilities. The original standard became Part 1 (Required Services). Additional parts were created for Optional Services (Part 2, first published in 2007), Conformity Test Specification (Part 3, first published in 2006), and Subset Services (Part 4, first published in 2012). This paper focuses on the required services as described in ARINC 653 Part 1.

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References

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