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Double-Emitter HCBT Structure—A High-Voltage Bipolar Transistor for BiCMOS Integration | IEEE Journals & Magazine | IEEE Xplore

Double-Emitter HCBT Structure—A High-Voltage Bipolar Transistor for BiCMOS Integration


Abstract:

Fabrication of a novel high-voltage double-emitter horizontal current bipolar transistor (HCBT) structure integrated with the standard 0.18-\mu\hbox{m} CMOS and high-sp...Show More

Abstract:

Fabrication of a novel high-voltage double-emitter horizontal current bipolar transistor (HCBT) structure integrated with the standard 0.18-\mu\hbox{m} CMOS and high-speed HCBT is presented. The device takes advantage of 3-D collector charge sharing to achieve full depletion of the intrinsic collector region and to limit the electric field at the base–collector junction. Transistors with BV_{\rm CEO} = \hbox{12.6}\ \hbox{V}, f_{T} \cdot BV_{\rm CEO} = \hbox{160}\ \hbox{GHz}\cdot \hbox{V} , and \beta \cdot VA = \hbox{28}\,\hbox{700}\ \hbox{V} are demonstrated. The device is fabricated in HCBT BiCMOS process flow without the use of additional lithography masks and represents a zero-cost solution for integration of a high-voltage bipolar device.
Published in: IEEE Transactions on Electron Devices ( Volume: 59, Issue: 12, December 2012)
Page(s): 3647 - 3650
Date of Publication: 16 November 2012

ISSN Information:

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I. Introduction

Bipolar transistor structures for BiCMOS integration are usually based on the super-self-aligned transistor [1]. Different values of breakdown voltages are obtained by controlling the intrinsic collector concentration through various parameters of the selectively implanted collector, which usually requires additional lithography masks and increases the cost of technology. On the other hand, high-voltage bipolar transistors such as reduced surface field devices [2], gate associated transistor [3], and trench base-shielded bipolar transistor [4] take advantage of transistor geometry to achieve a high breakdown voltage. In these devices, the collector is fully depleted in the forward active mode of operation. This way, the maximum value of the electric field at the intrinsic base–collector junction is reduced, and the intrinsic base is shielded from the collector voltage. A similar effect of the limited electric field at the intrinsic base–collector junction is observed in vertical-current SiGe bipolar junction transistors made on a thin silicon-on-insulator (SOI) [5], [6], where collector charge is limited by the SOI thickness, and potential is pinned at the interface when the collector is fully depleted.

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References

References is not available for this document.