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Electronic transport in GAA silicon nanowire MOSFETs: From Kubo-Greenwood mobility including screening remote coulomb scattering to analytical backscattering coefficient | IEEE Conference Publication | IEEE Xplore

Electronic transport in GAA silicon nanowire MOSFETs: From Kubo-Greenwood mobility including screening remote coulomb scattering to analytical backscattering coefficient


Abstract:

This paper presents the study of electron mobility in intrinsic silicon nanowires using the Kubo-Greenwood approach. This architecture (now considered as a realistic tech...Show More

Abstract:

This paper presents the study of electron mobility in intrinsic silicon nanowires using the Kubo-Greenwood approach. This architecture (now considered as a realistic technology [1,2]) is aimed for ultra-scaled devices up to technology nodes sub-11nm [3] with silicon films of some nanometers. At these dimensions, the transport regime is completely modified due to the multi-subband transport. However, the promising potentialities of nanowires for microelectronic applications are not still demonstrated at all simulation levels (from atomistic to circuit performances). That is why the electronic transport is here investigated numerically using the Kubo-Greenwood approach coupled to a selfconsistent Schrödinger-Poisson solver. Then, to support compact modelling including ultimate physical phenomena, an analytical model of the electron mobility and backscattering coefficient is exposed. The geometry dependence is essentially pointed out on the backscattering coefficient for a wide range of channel lengths (up to 10 nm) and diameters (3 nm≤Ø≤20 nm).
Date of Conference: 22-25 May 2012
Date Added to IEEE Xplore: 19 July 2012
ISBN Information:
Conference Location: Madison, WI, USA

I. INTRODUCTION

Due to the exploration of alternative solutions featuring high performances, nanoelectronic devices have evolved towards architectures allowing a much better electrostatics control of the device active region compared to conventional MOSFETs. GAA nanowires MOSFETs, regarding their particular shape, are one of the most promising architectures. This is due to the surface controlled by the surrounding gate which is significantly much higher than for planar devices. With this architecture (now considered as a realistic technology due to recent significant progress of technological processes [1], [2]), it is possible to envisage ultra-scaled devices as required by the International Technology Roadmap for Semiconductor (ITRS, [3]). In order to assess potentialities of such an architecture, a deep understanding is required from the electronic transport up to performances at the circuit level. Although theoretical papers already investigated nanowire transport, it is hardly to manage the physics up to circuit simulation. In this context, this paper focuses on the multi-subband electronic transport in nanowire for MOSFET application in order to provide brief analytical models to support simulation. In the following, we will concentrate on the electron mobility, and more particularly on the impact of diameter shrinking thanks to numerical investigation. Then, physics-based analytical model is provided up to the backscattering coefficient where the impact of diameter is assessed from a compact model point of view.

References

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